JPS55103656A - Information processing system - Google Patents
Information processing systemInfo
- Publication number
- JPS55103656A JPS55103656A JP1010079A JP1010079A JPS55103656A JP S55103656 A JPS55103656 A JP S55103656A JP 1010079 A JP1010079 A JP 1010079A JP 1010079 A JP1010079 A JP 1010079A JP S55103656 A JPS55103656 A JP S55103656A
- Authority
- JP
- Japan
- Prior art keywords
- processing
- instruction
- inputted
- circuit
- unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Advance Control (AREA)
- Multi Processors (AREA)
Abstract
PURPOSE: To prevent degradation of the processing efficiency of a central operation processing unit by dividing a long-processing time instruction handled by an option processing unit into plural processing units.
CONSTITUTION: An instruction to be executed by option processing unit 2 is inputted to decoder 11 through option control line OPCL and decoded by decoder 11 and is inputted to one end of OR circuit 3. A re-start signal is inputted to the other end of circuit 3. This OR output is inputted to input end S of R-S type FF circuit 14, and an execution end signal is inputted to the other end R. Circuit 14 stores whether unit 2 is executing the processing operation or not and outputs a control signal to unit 1. An instruction data signal is inputted to instruction code register 15 from data bus 12, and instruction code register 15 holds it and supplies it to control circuit 16 to perform the instruction execution control. Since the number of processing digits is divided for a long-processing time instruction and unit 1 transfers parameters to execute the instruction so that interrupt acceptance is performed by divided units, data communication between units 1 and 2 accompained with the interrupt processing is needless, and the high-speed processing becomes possible.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1010079A JPS55103656A (en) | 1979-01-31 | 1979-01-31 | Information processing system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1010079A JPS55103656A (en) | 1979-01-31 | 1979-01-31 | Information processing system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS55103656A true JPS55103656A (en) | 1980-08-08 |
Family
ID=11740893
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1010079A Pending JPS55103656A (en) | 1979-01-31 | 1979-01-31 | Information processing system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55103656A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58205272A (en) * | 1982-05-25 | 1983-11-30 | Kokusai Electric Co Ltd | Alternate operating device for two computers with different functions |
| JPS59201154A (en) * | 1983-04-18 | 1984-11-14 | モトロ−ラ・インコ−ポレ−テツド | Method and apparatus for adjusting execution of instruction by joint processor |
| JPS62247426A (en) * | 1986-03-20 | 1987-10-28 | Fujitsu Ltd | Processing system for processing instruction of large quantity of data |
| JPH05225153A (en) * | 1991-07-10 | 1993-09-03 | Internatl Business Mach Corp <Ibm> | Apparatus and method for parallel processing of high-level instruction |
| JPH07168720A (en) * | 1993-12-15 | 1995-07-04 | Nec Corp | Language processing system |
-
1979
- 1979-01-31 JP JP1010079A patent/JPS55103656A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58205272A (en) * | 1982-05-25 | 1983-11-30 | Kokusai Electric Co Ltd | Alternate operating device for two computers with different functions |
| JPS59201154A (en) * | 1983-04-18 | 1984-11-14 | モトロ−ラ・インコ−ポレ−テツド | Method and apparatus for adjusting execution of instruction by joint processor |
| JPS62247426A (en) * | 1986-03-20 | 1987-10-28 | Fujitsu Ltd | Processing system for processing instruction of large quantity of data |
| JPH05225153A (en) * | 1991-07-10 | 1993-09-03 | Internatl Business Mach Corp <Ibm> | Apparatus and method for parallel processing of high-level instruction |
| JPH07168720A (en) * | 1993-12-15 | 1995-07-04 | Nec Corp | Language processing system |
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