JPS5789126A - Data transfer control system - Google Patents
Data transfer control systemInfo
- Publication number
- JPS5789126A JPS5789126A JP16322780A JP16322780A JPS5789126A JP S5789126 A JPS5789126 A JP S5789126A JP 16322780 A JP16322780 A JP 16322780A JP 16322780 A JP16322780 A JP 16322780A JP S5789126 A JPS5789126 A JP S5789126A
- Authority
- JP
- Japan
- Prior art keywords
- main computer
- memory
- transfer
- instruction
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
Abstract
PURPOSE:To eliminate the data transfer work out of a main computer and to increase the working efficiency of the main computer, by providing a table memory, a register, a microsequencer, etc. in addition to the main computer. CONSTITUTION:In addition to a main computer CPU, a table memory TBM, a transfer counter TCU and external device EXE are connected via a data bus DAB. At the same time, a microsequencer MS, an instruction memory ODM, an instruction register ORG and an instruction decoder ODE are provided. Then the working of each part is controlled by the signal which is transmitted from the decoder ODE in accordance with the operation of the sequencer MS using a microprocessor. On the other hand, a transfer control part TCT is provided to control the transfer information that is stored into the memory TBM from the computer CPU. As a result, the data is transferred to a memory of an external device from a main computer based on the contents the counter TCU. Thus the working efficiency is increased for the computer CPU.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16322780A JPS5789126A (en) | 1980-11-21 | 1980-11-21 | Data transfer control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16322780A JPS5789126A (en) | 1980-11-21 | 1980-11-21 | Data transfer control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5789126A true JPS5789126A (en) | 1982-06-03 |
Family
ID=15769731
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16322780A Pending JPS5789126A (en) | 1980-11-21 | 1980-11-21 | Data transfer control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5789126A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104632243A (en) * | 2015-01-09 | 2015-05-20 | 葛洲坝集团第五工程有限公司 | Construction waste slag removing system and method for open type heading machine |
-
1980
- 1980-11-21 JP JP16322780A patent/JPS5789126A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104632243A (en) * | 2015-01-09 | 2015-05-20 | 葛洲坝集团第五工程有限公司 | Construction waste slag removing system and method for open type heading machine |
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