JPS56121167A - Data processing equipment - Google Patents
Data processing equipmentInfo
- Publication number
- JPS56121167A JPS56121167A JP2353680A JP2353680A JPS56121167A JP S56121167 A JPS56121167 A JP S56121167A JP 2353680 A JP2353680 A JP 2353680A JP 2353680 A JP2353680 A JP 2353680A JP S56121167 A JPS56121167 A JP S56121167A
- Authority
- JP
- Japan
- Prior art keywords
- rank
- program
- circuit
- processor
- interruption
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
- G06F9/4818—Priority circuits therefor
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Bus Control (AREA)
Abstract
PURPOSE:To execute an interruption to the processor which is executing a program of low rank, without using an exclusive interruption control unit, by comparing the rank which has combined a program rank and a subdivision rank, between the respective processors. CONSTITUTION:A register 1 for generating the rank position showing a priority rank of a program, and a division rank data generating circuit 2 for adding the division rank to the execution priority rank are provided on plural program control units, respectively. The outputs of said register 1 and circuit 2 are provided to the processor selective circuit 3 which receives a data from other processor by the communication line 101 and transmits its output to other processor through the communication line 101. Also, a program rank data from the register 1 and an interruption rank data from the communication line 104 are compared by the comparator 5, and its result is provided to the AND circuit 6. And, when the output of the signal line 102 selected by the circuit 3 is ''1'', and interruption operation start signal is output to the communication line 103 from the circuit 6, and an interruption by the processor which is executing a program of low rank is executed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2353680A JPS56121167A (en) | 1980-02-27 | 1980-02-27 | Data processing equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2353680A JPS56121167A (en) | 1980-02-27 | 1980-02-27 | Data processing equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56121167A true JPS56121167A (en) | 1981-09-22 |
JPS6133224B2 JPS6133224B2 (en) | 1986-08-01 |
Family
ID=12113176
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2353680A Granted JPS56121167A (en) | 1980-02-27 | 1980-02-27 | Data processing equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56121167A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59177656A (en) * | 1983-03-29 | 1984-10-08 | Nec Corp | Program switching controller |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63119082A (en) * | 1986-11-07 | 1988-05-23 | Michihiko Saeki | Recording card medium |
US4831244A (en) * | 1987-10-01 | 1989-05-16 | Polaroid Corporation | Optical record cards |
-
1980
- 1980-02-27 JP JP2353680A patent/JPS56121167A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59177656A (en) * | 1983-03-29 | 1984-10-08 | Nec Corp | Program switching controller |
Also Published As
Publication number | Publication date |
---|---|
JPS6133224B2 (en) | 1986-08-01 |
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