JPS57146376A - Vector operation processor with mask - Google Patents

Vector operation processor with mask

Info

Publication number
JPS57146376A
JPS57146376A JP3130281A JP3130281A JPS57146376A JP S57146376 A JPS57146376 A JP S57146376A JP 3130281 A JP3130281 A JP 3130281A JP 3130281 A JP3130281 A JP 3130281A JP S57146376 A JPS57146376 A JP S57146376A
Authority
JP
Japan
Prior art keywords
instruction
mask
storage device
vector
different
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3130281A
Other languages
Japanese (ja)
Other versions
JPH0222417B2 (en
Inventor
Koichiro Omoda
Shigeo Nagashima
Shunichi Torii
Yasuhiro Inagami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3130281A priority Critical patent/JPS57146376A/en
Publication of JPS57146376A publication Critical patent/JPS57146376A/en
Publication of JPH0222417B2 publication Critical patent/JPH0222417B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
  • Advance Control (AREA)

Abstract

PURPOSE:To avoid the use of an instruction changing mask information, by giving a different instruction code to an instruction and generating different mask information, when the mask information required for each instruction is different, with regard to a plurality of instructions requiring the same operations. CONSTITUTION:An instruction is sequentially read out from a main storage device 101 with an instruction controller 103 and the instructions are interpreted. When the instruction interpreted by the device 103 is a vector instruction, the instruction is executed with a vector instruction control circuit 105 and a mask instruction discriminating circuit 114. When the instruction is a non-vector instruction, the data read out from the main storage device 101 via a storage device 102 and operating control information are transferred to an operating controller 104 via the signal line 203 for the instruction of start.
JP3130281A 1981-03-06 1981-03-06 Vector operation processor with mask Granted JPS57146376A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3130281A JPS57146376A (en) 1981-03-06 1981-03-06 Vector operation processor with mask

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3130281A JPS57146376A (en) 1981-03-06 1981-03-06 Vector operation processor with mask

Publications (2)

Publication Number Publication Date
JPS57146376A true JPS57146376A (en) 1982-09-09
JPH0222417B2 JPH0222417B2 (en) 1990-05-18

Family

ID=12327488

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3130281A Granted JPS57146376A (en) 1981-03-06 1981-03-06 Vector operation processor with mask

Country Status (1)

Country Link
JP (1) JPS57146376A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125472A (en) * 1982-12-30 1984-07-19 Fujitsu Ltd Controller for execution of sequential instruction
JPS6320683A (en) * 1986-07-15 1988-01-28 Fujitsu Ltd Vector assignment optimization processing system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125472A (en) * 1982-12-30 1984-07-19 Fujitsu Ltd Controller for execution of sequential instruction
JPH0412502B2 (en) * 1982-12-30 1992-03-04 Fujitsu Ltd
JPS6320683A (en) * 1986-07-15 1988-01-28 Fujitsu Ltd Vector assignment optimization processing system
JPH056227B2 (en) * 1986-07-15 1993-01-26 Fujitsu Ltd

Also Published As

Publication number Publication date
JPH0222417B2 (en) 1990-05-18

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