JPS57212549A - Information processing device - Google Patents

Information processing device

Info

Publication number
JPS57212549A
JPS57212549A JP56097592A JP9759281A JPS57212549A JP S57212549 A JPS57212549 A JP S57212549A JP 56097592 A JP56097592 A JP 56097592A JP 9759281 A JP9759281 A JP 9759281A JP S57212549 A JPS57212549 A JP S57212549A
Authority
JP
Japan
Prior art keywords
interruption
processing
instruction
cause
master
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56097592A
Other languages
Japanese (ja)
Other versions
JPH0147818B2 (en
Inventor
Keiichiro Uchida
Tetsuo Okamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56097592A priority Critical patent/JPS57212549A/en
Publication of JPS57212549A publication Critical patent/JPS57212549A/en
Publication of JPH0147818B2 publication Critical patent/JPH0147818B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0709—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a distributed system consisting of a plurality of standalone computer nodes, e.g. clusters, client-server systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0745—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in an input/output transactions management context
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor

Abstract

PURPOSE:To simplify the interruption processing considerably, by executing the interruption processing in a master processing device when an interruption cause occurs and holding interruption cause information in master and slave processing devices independently of each other. CONSTITUTION:When a vector instruction is sent from an instruction controlling part of a master processing device 2, the vector instruction is set to an instruction register 7 of a slave processing device 3 successively and is decoded by a decoder 9, and the vector operation processing is executed by a vector instruction operator 10. If a fault occurs in the device 3, an interruption condition is detected by an interruption condition detecting circuit 13 and is reported to the device 2. This interruption cause is held in an interruption cause holding circuit 14-1. If an interruption cause occurs in the device 2, it is held in an interruption cause holding circuit 14-0. When all instruction processings are terminated in the device 3, a processing completion detecting circuit 12 transmits a processing completion signal to the device 2. Thus, the output of an AND circuit 17 is turned on, and an interruption processing permission signal is transmitted to an interruption processing part which is not shown in figure.
JP56097592A 1981-06-25 1981-06-25 Information processing device Granted JPS57212549A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56097592A JPS57212549A (en) 1981-06-25 1981-06-25 Information processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56097592A JPS57212549A (en) 1981-06-25 1981-06-25 Information processing device

Publications (2)

Publication Number Publication Date
JPS57212549A true JPS57212549A (en) 1982-12-27
JPH0147818B2 JPH0147818B2 (en) 1989-10-17

Family

ID=14196501

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56097592A Granted JPS57212549A (en) 1981-06-25 1981-06-25 Information processing device

Country Status (1)

Country Link
JP (1) JPS57212549A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6029870A (en) * 1983-07-28 1985-02-15 Toshiba Corp Vector processing unit
EP0141232A2 (en) * 1983-10-24 1985-05-15 International Business Machines Corporation Vector processing unit
EP0147599A2 (en) * 1983-12-30 1985-07-10 International Business Machines Corporation Data processing system including a main processor and a co-processor and co-processor error handling logic
JPS6297032A (en) * 1985-10-23 1987-05-06 Yokogawa Hewlett Packard Ltd Computer containing pre-shifter
JP2021043605A (en) * 2019-09-09 2021-03-18 富士通株式会社 Information processor, information processing method and information processing program

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4990463A (en) * 1972-12-28 1974-08-29
JPS50111947A (en) * 1974-02-12 1975-09-03

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4990463A (en) * 1972-12-28 1974-08-29
JPS50111947A (en) * 1974-02-12 1975-09-03

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6029870A (en) * 1983-07-28 1985-02-15 Toshiba Corp Vector processing unit
JPH0560141B2 (en) * 1983-07-28 1993-09-01 Tokyo Shibaura Electric Co
EP0141232A2 (en) * 1983-10-24 1985-05-15 International Business Machines Corporation Vector processing unit
EP0147599A2 (en) * 1983-12-30 1985-07-10 International Business Machines Corporation Data processing system including a main processor and a co-processor and co-processor error handling logic
JPS6297032A (en) * 1985-10-23 1987-05-06 Yokogawa Hewlett Packard Ltd Computer containing pre-shifter
JP2021043605A (en) * 2019-09-09 2021-03-18 富士通株式会社 Information processor, information processing method and information processing program

Also Published As

Publication number Publication date
JPH0147818B2 (en) 1989-10-17

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