JPS56155453A - Program execution controlling system - Google Patents
Program execution controlling systemInfo
- Publication number
- JPS56155453A JPS56155453A JP5905180A JP5905180A JPS56155453A JP S56155453 A JPS56155453 A JP S56155453A JP 5905180 A JP5905180 A JP 5905180A JP 5905180 A JP5905180 A JP 5905180A JP S56155453 A JPS56155453 A JP S56155453A
- Authority
- JP
- Japan
- Prior art keywords
- register group
- register
- program execution
- coincidence
- execution controlling
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/273—Tester hardware, i.e. output processing circuits
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Abstract
PURPOSE:To make the program execution controlling function effective only under a special condition, by adding a register group where optional data can be set, a control register corresponding to registers of this register group, and a coincidence circuit. CONSTITUTION:Effectiveness/ineffectiveness of the program execution controlling function is selected for respective registers of A register group 40 individually by control register 42. Optional data which are checked for coincidence with contents of register of correspoinding A register group 40 are set to respective registers of B register group 20. When central processor 2 accesses main storage device 1, coincidence between contents of A register group 40 and B register group 20 is checked by contents of control register 42. All coincidence detection signals 26 are operated for AND, and this signal is sent to program execution controlling circuit 25 to output stop signal 27 or interruption request signal 28.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5905180A JPS56155453A (en) | 1980-05-02 | 1980-05-02 | Program execution controlling system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5905180A JPS56155453A (en) | 1980-05-02 | 1980-05-02 | Program execution controlling system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56155453A true JPS56155453A (en) | 1981-12-01 |
Family
ID=13102130
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5905180A Pending JPS56155453A (en) | 1980-05-02 | 1980-05-02 | Program execution controlling system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56155453A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01237848A (en) * | 1988-03-18 | 1989-09-22 | Seiko Epson Corp | Software development supporting device |
JPH01244550A (en) * | 1988-03-25 | 1989-09-28 | Pfu Ltd | Engineer panel control system |
-
1980
- 1980-05-02 JP JP5905180A patent/JPS56155453A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01237848A (en) * | 1988-03-18 | 1989-09-22 | Seiko Epson Corp | Software development supporting device |
JPH01244550A (en) * | 1988-03-25 | 1989-09-28 | Pfu Ltd | Engineer panel control system |
JPH0528854B2 (en) * | 1988-03-25 | 1993-04-27 | Pfu Ltd |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS6425249A (en) | Data processor | |
JPS56155453A (en) | Program execution controlling system | |
JPS57168350A (en) | Information processor | |
EP0103850A3 (en) | Separate resetting of processors in a multiprocessor control | |
JPS56153457A (en) | Measuring device for computer load | |
JPS57108952A (en) | Busy control system | |
JPS57113169A (en) | Microcomputer | |
JPS57113171A (en) | System constitution control system | |
JPS5727322A (en) | Input and output controlling system of computer | |
JPS55102062A (en) | Fail safe system | |
JPS56121167A (en) | Data processing equipment | |
JPS57132226A (en) | Interprocessor data transfer system | |
JPS5717058A (en) | Control system of microprogram | |
JPS57193842A (en) | Request conflict detecting system | |
JPS52106080A (en) | Failure diagnosis system | |
JPS5693496A (en) | Fault detection system of electronic exchange | |
JPS5566015A (en) | Shared line state detection system | |
JPS57201946A (en) | Fault monitoring control system | |
JPS5797163A (en) | Operation instructing system of multiprocessor | |
JPS5617422A (en) | Interruption control system of information processor | |
JPS52141144A (en) | Data input unit | |
JPS57141757A (en) | Data processor | |
JPS57150051A (en) | Memory control system | |
JPS5552155A (en) | Check system of arithmetic logical operation unit | |
JPS5621250A (en) | Instruction retrial system |