JPS5621250A - Instruction retrial system - Google Patents

Instruction retrial system

Info

Publication number
JPS5621250A
JPS5621250A JP9702879A JP9702879A JPS5621250A JP S5621250 A JPS5621250 A JP S5621250A JP 9702879 A JP9702879 A JP 9702879A JP 9702879 A JP9702879 A JP 9702879A JP S5621250 A JPS5621250 A JP S5621250A
Authority
JP
Japan
Prior art keywords
instruction
retrial
state
latch
source data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9702879A
Other languages
Japanese (ja)
Other versions
JPS6049344B2 (en
Inventor
Tetsuhiko Ifuku
Toshiharu Matsuda
Koichi Sasamori
Hideaki Ando
Yoshio Yamamuro
Hiroshi Takada
Masahiro Kuriyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54097028A priority Critical patent/JPS6049344B2/en
Publication of JPS5621250A publication Critical patent/JPS5621250A/en
Publication of JPS6049344B2 publication Critical patent/JPS6049344B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Retry When Errors Occur (AREA)

Abstract

PURPOSE: To remarkably increase the chance of instruction retrial, by checking whether or not the source data is rewritten and determining the propriety of instruction retrial based on this result.
CONSTITUTION: When a failure is detected at the central processing unit, the central processing unit is at clock stop state. In this case, if the source data is altered, the state of the latch 5 is "1", and is the source data is not changed, the state of the latch 5 is "0". If the latch 5 is "0" state and the instruction execution signal is at "1", the AND circuit 6 outputs the signal "1" indicating instruction retrial possible. If the source data is already changed, the state of latch 5 is at "0" and the "0" signal indicating instruction retrial disable is output from the AND circuit 6.
COPYRIGHT: (C)1981,JPO&Japio
JP54097028A 1979-07-30 1979-07-30 Instruction retry method Expired JPS6049344B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54097028A JPS6049344B2 (en) 1979-07-30 1979-07-30 Instruction retry method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54097028A JPS6049344B2 (en) 1979-07-30 1979-07-30 Instruction retry method

Publications (2)

Publication Number Publication Date
JPS5621250A true JPS5621250A (en) 1981-02-27
JPS6049344B2 JPS6049344B2 (en) 1985-11-01

Family

ID=14180985

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54097028A Expired JPS6049344B2 (en) 1979-07-30 1979-07-30 Instruction retry method

Country Status (1)

Country Link
JP (1) JPS6049344B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62272329A (en) * 1986-05-20 1987-11-26 Nec Corp Retry system for move instruction

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62272329A (en) * 1986-05-20 1987-11-26 Nec Corp Retry system for move instruction

Also Published As

Publication number Publication date
JPS6049344B2 (en) 1985-11-01

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