JPS54133851A - Data transfer controller - Google Patents

Data transfer controller

Info

Publication number
JPS54133851A
JPS54133851A JP4119578A JP4119578A JPS54133851A JP S54133851 A JPS54133851 A JP S54133851A JP 4119578 A JP4119578 A JP 4119578A JP 4119578 A JP4119578 A JP 4119578A JP S54133851 A JPS54133851 A JP S54133851A
Authority
JP
Japan
Prior art keywords
controller
data
transfer
check
coincidence
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4119578A
Other languages
Japanese (ja)
Inventor
Toshitaka Hara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4119578A priority Critical patent/JPS54133851A/en
Publication of JPS54133851A publication Critical patent/JPS54133851A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To make it possible to check data within the same time as normal transfer by reading out data transferred once from an input-output unit and a main memory unit both at the next time and by making a coincidence check by a transfer controller. CONSTITUTION:Main memory unit 10 and main arithmetic part 11 are connected together via a memory bus, and access to data such as instruction words of a processor is attained. Further, input-output device 13 is connected to transfer controller 12 via bus 16, and controller 12 is connected to device 10 via bus 15 and equipped with a transfer data comparator circuit included in controller 12, thereby outputting a coincidence or dissidence output to signal line 18. Consequently, data transferred once are read out from devices 13 and 11 both at the next time and a coincidence check is made by controller 12, so that a check on data can be made within the same time as normal transfer.
JP4119578A 1978-04-10 1978-04-10 Data transfer controller Pending JPS54133851A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4119578A JPS54133851A (en) 1978-04-10 1978-04-10 Data transfer controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4119578A JPS54133851A (en) 1978-04-10 1978-04-10 Data transfer controller

Publications (1)

Publication Number Publication Date
JPS54133851A true JPS54133851A (en) 1979-10-17

Family

ID=12601631

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4119578A Pending JPS54133851A (en) 1978-04-10 1978-04-10 Data transfer controller

Country Status (1)

Country Link
JP (1) JPS54133851A (en)

Similar Documents

Publication Publication Date Title
JPS54122043A (en) Electronic computer
JPS648580A (en) Memory device for electronic equipment
JPS54133851A (en) Data transfer controller
JPS5326632A (en) Common memory control unit
JPS5336149A (en) Information processing system
JPS5440049A (en) Information process system
JPS5727322A (en) Input and output controlling system of computer
JPS5424553A (en) Control system for data transfer
JPS55110349A (en) Test processing system of one-chip microprocessor
JPS57203162A (en) One-chip microcomputer
JPS5636744A (en) Microcomputer unit
JPS5745657A (en) Storage device
JPS5563423A (en) Data transfer system
JPS5759222A (en) Dma data transfer system
JPS5477541A (en) Information signal checking device for computer
JPS5335342A (en) Information memory system
JPS5421229A (en) Data fetch system
JPS5330243A (en) Arithmetic processor
JPS5434728A (en) Input/output control system
JPS56118164A (en) Processor of video information
JPS578847A (en) Information processor
JPS5783864A (en) Multiprocessor system
JPS5528132A (en) Unit constitution and processing system
JPS5422137A (en) Bus line chekcing device
JPS5621250A (en) Instruction retrial system

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20040406

A131 Notification of reasons for refusal

Effective date: 20041026

Free format text: JAPANESE INTERMEDIATE CODE: A131

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20050126

A602 Written permission of extension of time

Effective date: 20050328

Free format text: JAPANESE INTERMEDIATE CODE: A602

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050413

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20050621

A61 First payment of annual fees (during grant procedure)

Effective date: 20050629

Free format text: JAPANESE INTERMEDIATE CODE: A61

R150 Certificate of patent (=grant) or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

R154 Certificate of patent or utility model (reissue)

Free format text: JAPANESE INTERMEDIATE CODE: R154

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 4

Free format text: PAYMENT UNTIL: 20090722

LAPS Cancellation because of no payment of annual fees