JPS578847A - Information processor - Google Patents

Information processor

Info

Publication number
JPS578847A
JPS578847A JP8247880A JP8247880A JPS578847A JP S578847 A JPS578847 A JP S578847A JP 8247880 A JP8247880 A JP 8247880A JP 8247880 A JP8247880 A JP 8247880A JP S578847 A JPS578847 A JP S578847A
Authority
JP
Japan
Prior art keywords
register
response code
system interface
cpu
console panel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8247880A
Other languages
Japanese (ja)
Other versions
JPS6122814B2 (en
Inventor
Toshio Yagihashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8247880A priority Critical patent/JPS578847A/en
Publication of JPS578847A publication Critical patent/JPS578847A/en
Publication of JPS6122814B2 publication Critical patent/JPS6122814B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To decrease the number of interface lines and that of attached circuits by integrating a system interface control circuit and a main-storage accessing circuit as a device, and by connecting the device to a console panel via a couple of interface lines. CONSTITUTION:When an operation indication signal is sent from a console panel to a system interface controller 2 via a system interface line (a), it is inputted to an operation code receiving register 8. Then, when a decoder 6 is accessed, the decoder 6 fetches the indication signal from a register 8 and outputs it to a register 7. The output of the register 7 is sent to a CPU via a signal line 100. The CPU, on the other hand, puts a main-storage access control circuit 12 in operation to read an operation code from the register 8. After a response code is generated, the CPU puts the circuit 12 in operation through a memory interface line 102 to write the response code in a response code register 9. Then, the response code is sent back to the console panel via a system interface line 107.
JP8247880A 1980-06-18 1980-06-18 Information processor Granted JPS578847A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8247880A JPS578847A (en) 1980-06-18 1980-06-18 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8247880A JPS578847A (en) 1980-06-18 1980-06-18 Information processor

Publications (2)

Publication Number Publication Date
JPS578847A true JPS578847A (en) 1982-01-18
JPS6122814B2 JPS6122814B2 (en) 1986-06-03

Family

ID=13775612

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8247880A Granted JPS578847A (en) 1980-06-18 1980-06-18 Information processor

Country Status (1)

Country Link
JP (1) JPS578847A (en)

Also Published As

Publication number Publication date
JPS6122814B2 (en) 1986-06-03

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