JPS57187729A - Input module device - Google Patents
Input module deviceInfo
- Publication number
- JPS57187729A JPS57187729A JP7296281A JP7296281A JPS57187729A JP S57187729 A JPS57187729 A JP S57187729A JP 7296281 A JP7296281 A JP 7296281A JP 7296281 A JP7296281 A JP 7296281A JP S57187729 A JPS57187729 A JP S57187729A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- time
- state change
- input module
- occurrence
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
- G06F9/4825—Interrupt from clock, e.g. time of day
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Abstract
PURPOSE:To detect accurately the time of the occurrence of the state change of a digital signal which is inputted by the processing time or the like of a program, by providing a storage circuit in an input module device. CONSTITUTION:When an inputted digital input signal S1 is changed, the state change of the digital signal is detected by a detecting circuit 3 of an input module 2', and an external interrupting signal is transmitted from an interrupting signal generating circuit 4 to a microprocessor 1 through a microprocessor bus 6. A time signal S2 at this time is stored in a storage circuit 7. The microprocessor 1 which receives the external interrupting signal starts a program to read the changed digital signal S1 and the time signal S2 for the occurrence of the state change which is stored in the storage circuit 7, and thus, the conventional error due to the processing time or the like of the program is not generated when the time of the occurrence of the state change of the digital signal is read.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7296281A JPS57187729A (en) | 1981-05-13 | 1981-05-13 | Input module device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7296281A JPS57187729A (en) | 1981-05-13 | 1981-05-13 | Input module device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57187729A true JPS57187729A (en) | 1982-11-18 |
Family
ID=13504509
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7296281A Pending JPS57187729A (en) | 1981-05-13 | 1981-05-13 | Input module device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57187729A (en) |
-
1981
- 1981-05-13 JP JP7296281A patent/JPS57187729A/en active Pending
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