JPS55164930A - Signal fetch unit - Google Patents

Signal fetch unit

Info

Publication number
JPS55164930A
JPS55164930A JP7012679A JP7012679A JPS55164930A JP S55164930 A JPS55164930 A JP S55164930A JP 7012679 A JP7012679 A JP 7012679A JP 7012679 A JP7012679 A JP 7012679A JP S55164930 A JPS55164930 A JP S55164930A
Authority
JP
Japan
Prior art keywords
signal
leading
interruption
input
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7012679A
Other languages
Japanese (ja)
Inventor
Takeo Kuwabara
Kenji Kawamata
Yuichi Akihama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7012679A priority Critical patent/JPS55164930A/en
Publication of JPS55164930A publication Critical patent/JPS55164930A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To enable to fetch a number of input signals with a few interruption input terminals without fail, by the bit check for the input line changed in leading in the block of input signal and correcting the data table periodically.
CONSTITUTION: When any in the block of input signal 1 is changed for leading, the computer 3 performs the processing matching with the change in leading of the signal with interruption. That is, when leading signal is present on one signal line of the signal 1, it is detected at the leading change detector 6 and the interruption pulse is inputted to the interruption terminal 11 of the computer 3. This interruption signal starts the interruption program automatically to perform bit-check for the input line having leading change in the block of the signal 1, and the data table is corrected periodically according to the sampling time in the computer 3. Thus, a number of input signals can be fetched with a few terminals 11 without fail.
COPYRIGHT: (C)1980,JPO&Japio
JP7012679A 1979-06-06 1979-06-06 Signal fetch unit Pending JPS55164930A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7012679A JPS55164930A (en) 1979-06-06 1979-06-06 Signal fetch unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7012679A JPS55164930A (en) 1979-06-06 1979-06-06 Signal fetch unit

Publications (1)

Publication Number Publication Date
JPS55164930A true JPS55164930A (en) 1980-12-23

Family

ID=13422538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7012679A Pending JPS55164930A (en) 1979-06-06 1979-06-06 Signal fetch unit

Country Status (1)

Country Link
JP (1) JPS55164930A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01136205A (en) * 1987-11-24 1989-05-29 Fuji Electric Co Ltd Input circuit for programmable controller
JPH0736203U (en) * 1994-11-22 1995-07-04 富士電機株式会社 Input circuit of programmable controller

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01136205A (en) * 1987-11-24 1989-05-29 Fuji Electric Co Ltd Input circuit for programmable controller
JPH0736203U (en) * 1994-11-22 1995-07-04 富士電機株式会社 Input circuit of programmable controller

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