JPS5611550A - Comparison and coincidence circuit - Google Patents

Comparison and coincidence circuit

Info

Publication number
JPS5611550A
JPS5611550A JP8719879A JP8719879A JPS5611550A JP S5611550 A JPS5611550 A JP S5611550A JP 8719879 A JP8719879 A JP 8719879A JP 8719879 A JP8719879 A JP 8719879A JP S5611550 A JPS5611550 A JP S5611550A
Authority
JP
Japan
Prior art keywords
comparison
coincidence
failure
control program
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8719879A
Other languages
Japanese (ja)
Inventor
Hideaki Chiba
Akio Hanada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8719879A priority Critical patent/JPS5611550A/en
Publication of JPS5611550A publication Critical patent/JPS5611550A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To make easy the analysis of failure and to reduce the failure investigating time, by feeding the content of the comparison coincidence data register and the selective information register by the control program to the selective logic circuit and performing the production of coincidence condition of output of the circuit.
CONSTITUTION: The comparion and coincidence information read out with the out instruction of the control program is set to the comparison and coincidence data register 1 and also set to the designated registers 9...14, fed to the comparison circuits 15...20 and compared with the comparison objective data on the data line. Further, the comparison and concidence signals CPA...CPF are fed to the NOT circuits 23...29 of the selective logic circuit 22 to produce the comparison and coincidence condition desired from the circuit 22 together with the selection signals SLA...SLF of the control program output from the selection information register 21. Thus, trace of failure and analysis or detection of failed part can be made easy, allowing to remarkably reduce the failure investigating time.
COPYRIGHT: (C)1981,JPO&Japio
JP8719879A 1979-07-10 1979-07-10 Comparison and coincidence circuit Pending JPS5611550A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8719879A JPS5611550A (en) 1979-07-10 1979-07-10 Comparison and coincidence circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8719879A JPS5611550A (en) 1979-07-10 1979-07-10 Comparison and coincidence circuit

Publications (1)

Publication Number Publication Date
JPS5611550A true JPS5611550A (en) 1981-02-04

Family

ID=13908272

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8719879A Pending JPS5611550A (en) 1979-07-10 1979-07-10 Comparison and coincidence circuit

Country Status (1)

Country Link
JP (1) JPS5611550A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS598067A (en) * 1982-07-03 1984-01-17 Fujitsu Ltd Data processor
JPH03130841A (en) * 1989-10-17 1991-06-04 Nec Ic Microcomput Syst Ltd Back-up device for development of microcomputer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS598067A (en) * 1982-07-03 1984-01-17 Fujitsu Ltd Data processor
JPH0214736B2 (en) * 1982-07-03 1990-04-09 Fujitsu Ltd
JPH03130841A (en) * 1989-10-17 1991-06-04 Nec Ic Microcomput Syst Ltd Back-up device for development of microcomputer

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