JPS57113169A - Microcomputer - Google Patents

Microcomputer

Info

Publication number
JPS57113169A
JPS57113169A JP55187964A JP18796480A JPS57113169A JP S57113169 A JPS57113169 A JP S57113169A JP 55187964 A JP55187964 A JP 55187964A JP 18796480 A JP18796480 A JP 18796480A JP S57113169 A JPS57113169 A JP S57113169A
Authority
JP
Japan
Prior art keywords
switching
mpu
switching information
mpus
control signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55187964A
Other languages
Japanese (ja)
Inventor
Akisuke Mori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55187964A priority Critical patent/JPS57113169A/en
Publication of JPS57113169A publication Critical patent/JPS57113169A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE:To utilize the advantages of each MPU and to improve the functions of the whole system, by providing a specific restart switching circuit, etc., to use the optimum MPU selectively. CONSTITUTION:A microcomputer which has microprocessor MPU differing in architecture is provided with a data bus 3 through which switching information for selecting one of MPUs is supplied. Further, a restart switching circuit 1 is provided. Consequently, a write control signal 9 for the switching information is inputted, and the switching information is written by the write control signal 9 generated for switching and then held; and switching signals 4-6 are supplied to the reset terminals of the MPUs in accordance with the switching information, and only the selected MPU is reset and restarted.
JP55187964A 1980-12-29 1980-12-29 Microcomputer Pending JPS57113169A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55187964A JPS57113169A (en) 1980-12-29 1980-12-29 Microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55187964A JPS57113169A (en) 1980-12-29 1980-12-29 Microcomputer

Publications (1)

Publication Number Publication Date
JPS57113169A true JPS57113169A (en) 1982-07-14

Family

ID=16215233

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55187964A Pending JPS57113169A (en) 1980-12-29 1980-12-29 Microcomputer

Country Status (1)

Country Link
JP (1) JPS57113169A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0103850A2 (en) * 1982-09-21 1984-03-28 Xerox Corporation Separate resetting of processors in a multiprocessor control
EP0104858A2 (en) * 1982-09-21 1984-04-04 Xerox Corporation Remote processor crash recovery
FR2602601A1 (en) * 1986-08-06 1988-02-12 Nec Corp MEMORY INITIALIZATION SYSTEM
EP0426366A2 (en) * 1989-11-03 1991-05-08 Compaq Computer Corporation Method and apparatus for independently resetting processors and cache controllers in multiple processor systems
JP2002236527A (en) * 2001-02-08 2002-08-23 Hitachi Ltd Multiprocessor system and processor control method

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0103850A2 (en) * 1982-09-21 1984-03-28 Xerox Corporation Separate resetting of processors in a multiprocessor control
EP0104858A2 (en) * 1982-09-21 1984-04-04 Xerox Corporation Remote processor crash recovery
FR2602601A1 (en) * 1986-08-06 1988-02-12 Nec Corp MEMORY INITIALIZATION SYSTEM
EP0426366A2 (en) * 1989-11-03 1991-05-08 Compaq Computer Corporation Method and apparatus for independently resetting processors and cache controllers in multiple processor systems
JP2002236527A (en) * 2001-02-08 2002-08-23 Hitachi Ltd Multiprocessor system and processor control method

Similar Documents

Publication Publication Date Title
JPS57117027A (en) Signal sending and receiving circuit
JPS57113169A (en) Microcomputer
JPS57130150A (en) Register control system
JPS54100610A (en) Signal control system of time-division line concentrator
JPS5562590A (en) Microprogram control system
JPS53107240A (en) Control system of register memory
JPS575142A (en) Data processor with interface function
JPS5745657A (en) Storage device
JPS5760422A (en) Data transfer controlling system
JPS5570998A (en) Block switching system for memory unit
JPS5727328A (en) Control device
JPS5614353A (en) Control clock switching system
JPS5733472A (en) Memory access control system
JPS57209569A (en) Memory access device in vector processor system
JPS5624592A (en) Time setting system
JPS57100579A (en) Control system of printer
JPS5748127A (en) Data processor
JPS52102640A (en) Memory control circuit
JPS5748125A (en) Channel device
JPS56155453A (en) Program execution controlling system
JPS5647979A (en) Decoding system
JPS54508A (en) Spare system for exchange control system
JPS5573193A (en) Time switch control system
JPS57164351A (en) Debugging device
JPS5245858A (en) Control system of double stabilized circuit