JPS54508A - Spare system for exchange control system - Google Patents
Spare system for exchange control systemInfo
- Publication number
- JPS54508A JPS54508A JP6461677A JP6461677A JPS54508A JP S54508 A JPS54508 A JP S54508A JP 6461677 A JP6461677 A JP 6461677A JP 6461677 A JP6461677 A JP 6461677A JP S54508 A JPS54508 A JP S54508A
- Authority
- JP
- Japan
- Prior art keywords
- exchange control
- spare
- control system
- shunting
- coincidence
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q3/00—Selecting arrangements
- H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
- H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
- H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
- H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
- H04Q3/5455—Multi-processor, parallelism, distributed systems
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Hardware Redundancy (AREA)
- Monitoring And Testing Of Exchanges (AREA)
- Exchange Systems With Centralized Control (AREA)
Abstract
PURPOSE:To reduce the coincidence of the timing for synchronous operation and to make easy the shunting of processing information, by providing a crossing circuit constituted with a buffer memory between module processors.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52064616A JPS6015181B2 (en) | 1977-06-03 | 1977-06-03 | Exchange control system backup method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52064616A JPS6015181B2 (en) | 1977-06-03 | 1977-06-03 | Exchange control system backup method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54508A true JPS54508A (en) | 1979-01-05 |
JPS6015181B2 JPS6015181B2 (en) | 1985-04-18 |
Family
ID=13263361
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP52064616A Expired JPS6015181B2 (en) | 1977-06-03 | 1977-06-03 | Exchange control system backup method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6015181B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5599896A (en) * | 1979-01-23 | 1980-07-30 | Nec Corp | Time sharing communication path system |
JPS58112491A (en) * | 1981-12-24 | 1983-07-04 | Mitsui Eng & Shipbuild Co Ltd | Simultaneously operating method for plural driving machines |
-
1977
- 1977-06-03 JP JP52064616A patent/JPS6015181B2/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5599896A (en) * | 1979-01-23 | 1980-07-30 | Nec Corp | Time sharing communication path system |
JPS58112491A (en) * | 1981-12-24 | 1983-07-04 | Mitsui Eng & Shipbuild Co Ltd | Simultaneously operating method for plural driving machines |
Also Published As
Publication number | Publication date |
---|---|
JPS6015181B2 (en) | 1985-04-18 |
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