JPS53116006A - Data transfer discriminating system - Google Patents

Data transfer discriminating system

Info

Publication number
JPS53116006A
JPS53116006A JP3072077A JP3072077A JPS53116006A JP S53116006 A JPS53116006 A JP S53116006A JP 3072077 A JP3072077 A JP 3072077A JP 3072077 A JP3072077 A JP 3072077A JP S53116006 A JPS53116006 A JP S53116006A
Authority
JP
Japan
Prior art keywords
data transfer
discriminating system
transfer discriminating
counter
providing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3072077A
Other languages
Japanese (ja)
Inventor
Toru Tejima
Kazuo Sumiya
Akio Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3072077A priority Critical patent/JPS53116006A/en
Publication of JPS53116006A publication Critical patent/JPS53116006A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

PURPOSE:To surely perform the information transfer between the program controllers, by providing the counter in the data buffer of an electronic exchanger.
JP3072077A 1977-03-19 1977-03-19 Data transfer discriminating system Pending JPS53116006A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3072077A JPS53116006A (en) 1977-03-19 1977-03-19 Data transfer discriminating system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3072077A JPS53116006A (en) 1977-03-19 1977-03-19 Data transfer discriminating system

Publications (1)

Publication Number Publication Date
JPS53116006A true JPS53116006A (en) 1978-10-11

Family

ID=12311469

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3072077A Pending JPS53116006A (en) 1977-03-19 1977-03-19 Data transfer discriminating system

Country Status (1)

Country Link
JP (1) JPS53116006A (en)

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