JPS5599896A - Time sharing communication path system - Google Patents
Time sharing communication path systemInfo
- Publication number
- JPS5599896A JPS5599896A JP551579A JP551579A JPS5599896A JP S5599896 A JPS5599896 A JP S5599896A JP 551579 A JP551579 A JP 551579A JP 551579 A JP551579 A JP 551579A JP S5599896 A JPS5599896 A JP S5599896A
- Authority
- JP
- Japan
- Prior art keywords
- time sharing
- communication path
- line
- modules
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Abstract
PURPOSE:To obtain the unit suitable for medium and small sized digital exchange system, by avoiding physical restriction through the simplicity of coupling of constituent units and by LSI through the incorporation of the time sharing switch module into line correspondence module. CONSTITUTION:The time sharing exchange system communication path system consists of 6 sets of communication path modules M0-M5 incorporating the line correspondence section provided according to the subscriber line LC or office line and the time sharing switch section forming the communication path of communication message. The time sharing switch section of the modules M0-M5 consists of the time sharing multiplex circuit MUX and the time sharing communication path memory PM including the time sharing multiplex separation circuit DMUX, and the modules M0-M5 are connected with the two systems of buses via the bus interface element. Further, the line correspondence section is provided with the subscriber circuit LC, subscriber line concentrator C, and coding and decoding circuit CODEC and further, with the interface DT1 between digital stations, push button multi frequency receiver PBREC, and multi-frequency receiver between stations MFREC.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP551579A JPS5599896A (en) | 1979-01-23 | 1979-01-23 | Time sharing communication path system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP551579A JPS5599896A (en) | 1979-01-23 | 1979-01-23 | Time sharing communication path system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5599896A true JPS5599896A (en) | 1980-07-30 |
Family
ID=11613317
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP551579A Pending JPS5599896A (en) | 1979-01-23 | 1979-01-23 | Time sharing communication path system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5599896A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54508A (en) * | 1977-06-03 | 1979-01-05 | Nec Corp | Spare system for exchange control system |
-
1979
- 1979-01-23 JP JP551579A patent/JPS5599896A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54508A (en) * | 1977-06-03 | 1979-01-05 | Nec Corp | Spare system for exchange control system |
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