JPS5363820A - Data processing system using logical address-actual address conversion - Google Patents

Data processing system using logical address-actual address conversion

Info

Publication number
JPS5363820A
JPS5363820A JP13876876A JP13876876A JPS5363820A JP S5363820 A JPS5363820 A JP S5363820A JP 13876876 A JP13876876 A JP 13876876A JP 13876876 A JP13876876 A JP 13876876A JP S5363820 A JPS5363820 A JP S5363820A
Authority
JP
Japan
Prior art keywords
data processing
processing system
address
actual
logical address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13876876A
Other languages
Japanese (ja)
Inventor
Kazunari Hatanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13876876A priority Critical patent/JPS5363820A/en
Publication of JPS5363820A publication Critical patent/JPS5363820A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation

Abstract

PURPOSE:To make the operation-where a limited memory area is invalidatedsufficient at an invalidation processing time, by executing the conversion processing by utilizing the limited memory area in a corresponding table.
JP13876876A 1976-11-18 1976-11-18 Data processing system using logical address-actual address conversion Pending JPS5363820A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13876876A JPS5363820A (en) 1976-11-18 1976-11-18 Data processing system using logical address-actual address conversion

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13876876A JPS5363820A (en) 1976-11-18 1976-11-18 Data processing system using logical address-actual address conversion

Publications (1)

Publication Number Publication Date
JPS5363820A true JPS5363820A (en) 1978-06-07

Family

ID=15229732

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13876876A Pending JPS5363820A (en) 1976-11-18 1976-11-18 Data processing system using logical address-actual address conversion

Country Status (1)

Country Link
JP (1) JPS5363820A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7716452B1 (en) 1996-08-22 2010-05-11 Kelly Edmund J Translated memory protection apparatus for an advanced microprocessor

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS516626A (en) * 1974-07-08 1976-01-20 Hitachi Ltd

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS516626A (en) * 1974-07-08 1976-01-20 Hitachi Ltd

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7716452B1 (en) 1996-08-22 2010-05-11 Kelly Edmund J Translated memory protection apparatus for an advanced microprocessor
US7840776B1 (en) 1996-08-22 2010-11-23 Kelly Edmund J Translated memory protection apparatus for an advanced microprocessor
US8055877B1 (en) 1996-08-22 2011-11-08 Kelly Edmund J Translated memory protection apparatus for an advanced microprocessor

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