JPS52113146A - Synchronous system - Google Patents

Synchronous system

Info

Publication number
JPS52113146A
JPS52113146A JP3012376A JP3012376A JPS52113146A JP S52113146 A JPS52113146 A JP S52113146A JP 3012376 A JP3012376 A JP 3012376A JP 3012376 A JP3012376 A JP 3012376A JP S52113146 A JPS52113146 A JP S52113146A
Authority
JP
Japan
Prior art keywords
synchronous system
input
synchronous
pll
regenerating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3012376A
Other languages
Japanese (ja)
Other versions
JPS569813B2 (en
Inventor
Tatsuyuki Hori
Nobutoshi Maruyama
Ichiro Maki
Takeshi Katano
Katsu Arakawa
Tadatoshi Hagihira
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Panasonic Mobile Communications Co Ltd
Original Assignee
Nippon Telegraph and Telephone Corp
Matsushita Communication Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Matsushita Communication Industrial Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP3012376A priority Critical patent/JPS52113146A/en
Publication of JPS52113146A publication Critical patent/JPS52113146A/en
Publication of JPS569813B2 publication Critical patent/JPS569813B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop

Abstract

PURPOSE:To keep synchronous condition for the input with low S/N, by improving the synchronous circuit by PLL regenerating the clock pulse synchronizing to the input signal.
JP3012376A 1976-03-18 1976-03-18 Synchronous system Granted JPS52113146A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3012376A JPS52113146A (en) 1976-03-18 1976-03-18 Synchronous system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3012376A JPS52113146A (en) 1976-03-18 1976-03-18 Synchronous system

Publications (2)

Publication Number Publication Date
JPS52113146A true JPS52113146A (en) 1977-09-22
JPS569813B2 JPS569813B2 (en) 1981-03-04

Family

ID=12294991

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3012376A Granted JPS52113146A (en) 1976-03-18 1976-03-18 Synchronous system

Country Status (1)

Country Link
JP (1) JPS52113146A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60183841A (en) * 1984-03-02 1985-09-19 Nippon Telegr & Teleph Corp <Ntt> Bit synchronizing circuit
JPS62112229U (en) * 1986-01-07 1987-07-17
JPH01152829A (en) * 1987-12-10 1989-06-15 Matsushita Electric Ind Co Ltd Bit synchronizing circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60183841A (en) * 1984-03-02 1985-09-19 Nippon Telegr & Teleph Corp <Ntt> Bit synchronizing circuit
JPS62112229U (en) * 1986-01-07 1987-07-17
JPH01152829A (en) * 1987-12-10 1989-06-15 Matsushita Electric Ind Co Ltd Bit synchronizing circuit

Also Published As

Publication number Publication date
JPS569813B2 (en) 1981-03-04

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