JPS5553940A - Error detection system - Google Patents

Error detection system

Info

Publication number
JPS5553940A
JPS5553940A JP12625578A JP12625578A JPS5553940A JP S5553940 A JPS5553940 A JP S5553940A JP 12625578 A JP12625578 A JP 12625578A JP 12625578 A JP12625578 A JP 12625578A JP S5553940 A JPS5553940 A JP S5553940A
Authority
JP
Japan
Prior art keywords
error
check
data
circuit
crc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12625578A
Other languages
Japanese (ja)
Inventor
Shigeru Sakurai
Shigetoshi Suwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12625578A priority Critical patent/JPS5553940A/en
Publication of JPS5553940A publication Critical patent/JPS5553940A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To enhance the error check efficiency by giving the check even to the error occurring within the device which carries out the error check. CONSTITUTION:The reception data given from MODEM7 is sent to CRC check circuit 5 and output register 2 via reception buffer 1, and circuit 5 gives the error check to the reception data. While register 2 produces the prescribed data and transfers it to the processor. In this case, CRC arithmetic circuit 3 performs the operations in sequence based on the data given from register 2. Comparator 4 gives a comparison between the CRC data given from buffer 1 and the operation result of circuit 3. And in case no coincidence is obtained, the occurrence of the error is decided within communication control unit 8 to deliver error signal 6. Thus the error occurred even within the device performing the error check for the supplied data can be detected, accordingly enhancing the error detection efficiency for the data transmission system.
JP12625578A 1978-10-16 1978-10-16 Error detection system Pending JPS5553940A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12625578A JPS5553940A (en) 1978-10-16 1978-10-16 Error detection system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12625578A JPS5553940A (en) 1978-10-16 1978-10-16 Error detection system

Publications (1)

Publication Number Publication Date
JPS5553940A true JPS5553940A (en) 1980-04-19

Family

ID=14930638

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12625578A Pending JPS5553940A (en) 1978-10-16 1978-10-16 Error detection system

Country Status (1)

Country Link
JP (1) JPS5553940A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63108828A (en) * 1986-10-25 1988-05-13 Nippon Telegr & Teleph Corp <Ntt> Monitoring method for digital line

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5019226A (en) * 1973-05-18 1975-02-28
JPS5260539A (en) * 1975-11-13 1977-05-19 Fujitsu Ltd Error detection system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5019226A (en) * 1973-05-18 1975-02-28
JPS5260539A (en) * 1975-11-13 1977-05-19 Fujitsu Ltd Error detection system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63108828A (en) * 1986-10-25 1988-05-13 Nippon Telegr & Teleph Corp <Ntt> Monitoring method for digital line

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