JPS56135266A - Data processing system - Google Patents

Data processing system

Info

Publication number
JPS56135266A
JPS56135266A JP3936280A JP3936280A JPS56135266A JP S56135266 A JPS56135266 A JP S56135266A JP 3936280 A JP3936280 A JP 3936280A JP 3936280 A JP3936280 A JP 3936280A JP S56135266 A JPS56135266 A JP S56135266A
Authority
JP
Japan
Prior art keywords
data
data processing
processing
cpu110
devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3936280A
Other languages
Japanese (ja)
Inventor
Takeo Iketani
Makoto Kawai
Original Assignee
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Tateisi Electronics Co filed Critical Omron Tateisi Electronics Co
Priority to JP3936280A priority Critical patent/JPS56135266A/en
Publication of JPS56135266A publication Critical patent/JPS56135266A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine

Abstract

PURPOSE:To perform data processing efficiently by a main controller by allotting the data processing to processing controllers and by making them perform transfer processing. CONSTITUTION:This system is provided with main controller 100 which has master CPU110 and main memory device 120, and processing controllers 200 and 300 which have slave CPUs 210 and 310 and memory devices 220 and 320 respectively. For every kind of data, either one of devices 200 and 300 performs data processing to form an instruction code which includes the allotment partitions of devices 200 and 300 performing the data processing and the contents of the data processing. Every time data to be processed is generated, an instruction code is edited according to the kind of the data and then stored in a specific memory region of device 120. Then, if the start instruction is sent from CPU110 to CPUs 210 and 310, CPUs 210 and 310 fetch the instruction code from CPU110 and transfer data between the memory devices of controllers 200 and 300 and device 120.
JP3936280A 1980-03-26 1980-03-26 Data processing system Pending JPS56135266A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3936280A JPS56135266A (en) 1980-03-26 1980-03-26 Data processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3936280A JPS56135266A (en) 1980-03-26 1980-03-26 Data processing system

Publications (1)

Publication Number Publication Date
JPS56135266A true JPS56135266A (en) 1981-10-22

Family

ID=12550949

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3936280A Pending JPS56135266A (en) 1980-03-26 1980-03-26 Data processing system

Country Status (1)

Country Link
JP (1) JPS56135266A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59149548A (en) * 1982-12-06 1984-08-27 Digital Equipment Corp Apparatus and method for controlling data processing system using many processors
JPH01181149A (en) * 1988-01-14 1989-07-19 Nippon Telegr & Teleph Corp <Ntt> Additional processor control system
JPH03182795A (en) * 1989-12-13 1991-08-08 Miotsugu Tsumura High speed switching mechanism for song word screen
JPH03202893A (en) * 1989-12-29 1991-09-04 Mioji Tsumura Lyrics color changing mechanism in karaoke orchestration without lyrics) equipment

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59149548A (en) * 1982-12-06 1984-08-27 Digital Equipment Corp Apparatus and method for controlling data processing system using many processors
JPS6338733B2 (en) * 1982-12-06 1988-08-02 Digital Equipment Corp
JPH01181149A (en) * 1988-01-14 1989-07-19 Nippon Telegr & Teleph Corp <Ntt> Additional processor control system
JPH03182795A (en) * 1989-12-13 1991-08-08 Miotsugu Tsumura High speed switching mechanism for song word screen
JPH03202893A (en) * 1989-12-29 1991-09-04 Mioji Tsumura Lyrics color changing mechanism in karaoke orchestration without lyrics) equipment

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