JPS5723150A - Instruction execution device - Google Patents

Instruction execution device

Info

Publication number
JPS5723150A
JPS5723150A JP9724580A JP9724580A JPS5723150A JP S5723150 A JPS5723150 A JP S5723150A JP 9724580 A JP9724580 A JP 9724580A JP 9724580 A JP9724580 A JP 9724580A JP S5723150 A JPS5723150 A JP S5723150A
Authority
JP
Japan
Prior art keywords
instruction
register
stored
instruction execution
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9724580A
Other languages
Japanese (ja)
Inventor
Tomoji Nukiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9724580A priority Critical patent/JPS5723150A/en
Publication of JPS5723150A publication Critical patent/JPS5723150A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To increase the diversity of processing and to perform complicated processing without decreasing a processing speed, by decoding the output of a register as one instruction and by achieving instruction execution corresponding to the decoding result. CONSTITUTION:Instruction codes, when inputted from a terminal 2 in parallel, are stored first in a register 5 through an input and output register 3 and an internal bus 4. At the following timing, different instruction codes, when inputted from the terminal in parallel, are also stored in a register 6 through the input and output register 3 and the internal bus 4. Thus, as the instruction codes are stored, differing in timing, in the registers 5 and 6, they are led as one instruction code, to an instruction decoder 7, whose decoding result is supplied as a control signal to an instruction execution part CPU.
JP9724580A 1980-07-16 1980-07-16 Instruction execution device Pending JPS5723150A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9724580A JPS5723150A (en) 1980-07-16 1980-07-16 Instruction execution device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9724580A JPS5723150A (en) 1980-07-16 1980-07-16 Instruction execution device

Publications (1)

Publication Number Publication Date
JPS5723150A true JPS5723150A (en) 1982-02-06

Family

ID=14187197

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9724580A Pending JPS5723150A (en) 1980-07-16 1980-07-16 Instruction execution device

Country Status (1)

Country Link
JP (1) JPS5723150A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6070108A (en) * 1983-09-28 1985-04-20 Nippon Piston Ring Co Ltd Production of cam shaft
JPS60100228A (en) * 1983-11-04 1985-06-04 Sharp Corp Instruction fetch system of microcomputer
EP0395958A2 (en) * 1989-04-20 1990-11-07 Hitachi, Ltd. Microprocessor, and graphics processing apparatus and method using the same
US6727903B1 (en) 1989-04-20 2004-04-27 Hitachi, Ltd. Microprocessor, and graphics processing apparatus and method using the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5123136A (en) * 1974-08-20 1976-02-24 Canon Kk KOGAKUSOCHI

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5123136A (en) * 1974-08-20 1976-02-24 Canon Kk KOGAKUSOCHI

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6070108A (en) * 1983-09-28 1985-04-20 Nippon Piston Ring Co Ltd Production of cam shaft
JPS60100228A (en) * 1983-11-04 1985-06-04 Sharp Corp Instruction fetch system of microcomputer
EP0395958A2 (en) * 1989-04-20 1990-11-07 Hitachi, Ltd. Microprocessor, and graphics processing apparatus and method using the same
US6229543B1 (en) 1989-04-20 2001-05-08 Hitachi, Ltd. Microprocessor, and graphics processing apparatus and method using the same
US6727903B1 (en) 1989-04-20 2004-04-27 Hitachi, Ltd. Microprocessor, and graphics processing apparatus and method using the same

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