JPS5785129A - Input/output controller - Google Patents

Input/output controller

Info

Publication number
JPS5785129A
JPS5785129A JP16166980A JP16166980A JPS5785129A JP S5785129 A JPS5785129 A JP S5785129A JP 16166980 A JP16166980 A JP 16166980A JP 16166980 A JP16166980 A JP 16166980A JP S5785129 A JPS5785129 A JP S5785129A
Authority
JP
Japan
Prior art keywords
input
bus control
microinstruction
output bus
fetched
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16166980A
Other languages
Japanese (ja)
Other versions
JPH0152776B2 (en
Inventor
Junichi Kihara
Yoshiyuki Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP16166980A priority Critical patent/JPS5785129A/en
Publication of JPS5785129A publication Critical patent/JPS5785129A/en
Publication of JPH0152776B2 publication Critical patent/JPH0152776B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To greatly increase the processing efficiency, by executing when necessary both an input/output bus control microinstruction and other microinstructions. CONSTITUTION:When an input/output bus control microinstruction is held in an ROM dta register 219, the input/outputj bus control is started for an input/output bus control circuit 221. Accordingly the new input/output bus control is set under the queuing state until the circuit 221 becomes inactive. Then the next microinstruction is fetched to the register 219 in the next timing. In such a way, a parallel processor is made possible between an input/output bus control microinstruction for connection of input and output devices and various types of microinstructions for preparation of the data transfer. As a result, the processing efficiency is increased. Then the bit information at the mode part of an input/output bus control microinstruction is decided by the decoder in the circuit 221 to decide or not the next microinstruction is fetched. Accordingly the malfunction is never caused although the input/output bus control microinstruction is fetched to the register 219.
JP16166980A 1980-11-17 1980-11-17 Input/output controller Granted JPS5785129A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16166980A JPS5785129A (en) 1980-11-17 1980-11-17 Input/output controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16166980A JPS5785129A (en) 1980-11-17 1980-11-17 Input/output controller

Publications (2)

Publication Number Publication Date
JPS5785129A true JPS5785129A (en) 1982-05-27
JPH0152776B2 JPH0152776B2 (en) 1989-11-10

Family

ID=15739580

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16166980A Granted JPS5785129A (en) 1980-11-17 1980-11-17 Input/output controller

Country Status (1)

Country Link
JP (1) JPS5785129A (en)

Also Published As

Publication number Publication date
JPH0152776B2 (en) 1989-11-10

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