JPS6448160A - Serial interface control system - Google Patents

Serial interface control system

Info

Publication number
JPS6448160A
JPS6448160A JP62205435A JP20543587A JPS6448160A JP S6448160 A JPS6448160 A JP S6448160A JP 62205435 A JP62205435 A JP 62205435A JP 20543587 A JP20543587 A JP 20543587A JP S6448160 A JPS6448160 A JP S6448160A
Authority
JP
Japan
Prior art keywords
interrupt request
processor
interrupt
time
time set
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62205435A
Other languages
Japanese (ja)
Inventor
Hiroyuki Ono
Yuichi Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62205435A priority Critical patent/JPS6448160A/en
Publication of JPS6448160A publication Critical patent/JPS6448160A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt

Abstract

PURPOSE:To reduce the burden on a processor by providing an interrupt request control circuit and a time set register and varying the interrupt generation time of the processor in accordance with the time set to the register. CONSTITUTION:An interrupt request control circuit 5 which interrupts a processor 1 by the interrupt request from the interface side and a time set register 6 which sets the time to the next interrupt after interrupt generation are connected, and the interrupt generation time of the processor 1 is varied by the time set to the register 6. That is, when the interrupt request signal is issued from the interface side to the processor 1, the interrupt request control circuit 5 provided between them delays the interrupt request signal by the time set to the time set register 6 and arbitrarily changes the time from interrupt request negation to next interrupt request enabling to transfer data, thereby reducing the burden on the processor.
JP62205435A 1987-08-19 1987-08-19 Serial interface control system Pending JPS6448160A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62205435A JPS6448160A (en) 1987-08-19 1987-08-19 Serial interface control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62205435A JPS6448160A (en) 1987-08-19 1987-08-19 Serial interface control system

Publications (1)

Publication Number Publication Date
JPS6448160A true JPS6448160A (en) 1989-02-22

Family

ID=16506820

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62205435A Pending JPS6448160A (en) 1987-08-19 1987-08-19 Serial interface control system

Country Status (1)

Country Link
JP (1) JPS6448160A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0497628A2 (en) * 1991-01-31 1992-08-05 Nec Corporation Interrupt controller for a multiprocessor computer system
JP2014146278A (en) * 2013-01-30 2014-08-14 Ricoh Co Ltd Switch device, image processor and exclusive control method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0497628A2 (en) * 1991-01-31 1992-08-05 Nec Corporation Interrupt controller for a multiprocessor computer system
JP2014146278A (en) * 2013-01-30 2014-08-14 Ricoh Co Ltd Switch device, image processor and exclusive control method

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