JPS6441932A - Data processing control system - Google Patents

Data processing control system

Info

Publication number
JPS6441932A
JPS6441932A JP19741387A JP19741387A JPS6441932A JP S6441932 A JPS6441932 A JP S6441932A JP 19741387 A JP19741387 A JP 19741387A JP 19741387 A JP19741387 A JP 19741387A JP S6441932 A JPS6441932 A JP S6441932A
Authority
JP
Japan
Prior art keywords
instruction
branch
circuit
success
counting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19741387A
Other languages
Japanese (ja)
Inventor
Katsuo Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP19741387A priority Critical patent/JPS6441932A/en
Publication of JPS6441932A publication Critical patent/JPS6441932A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To increase the processing speed of a branch instruction and to improve a processing performance by using the output of a branch instruction counting circuit for control conditions concerning a branch instruction and switching the input of two instruction registers of an instruction decoding circuit. CONSTITUTION:An instruction is read from a main storage device 1, decoded by an instruction decoding circuit 5 and executed by an instruction executing circuit 7. By the instruction execution, the number of the success and failure of the branch in the branch instruction is given to a branch instruction counting circuit 9. The counting circuit 9 uses the counting result for the control conditions concerning the branch instruction. For example, a branch instruction switching circuit 8 is controlled, and the instruction decoding circuit 5 and two instruction registers 3 and 4 are switched based on the branch success or the failure priority. When the switching circuit 8 receives a special instruction related to the branch success, the register 4 is selected and the input of the instruction decoding circuit 5 is switched to the register 4 side.
JP19741387A 1987-08-07 1987-08-07 Data processing control system Pending JPS6441932A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19741387A JPS6441932A (en) 1987-08-07 1987-08-07 Data processing control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19741387A JPS6441932A (en) 1987-08-07 1987-08-07 Data processing control system

Publications (1)

Publication Number Publication Date
JPS6441932A true JPS6441932A (en) 1989-02-14

Family

ID=16374100

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19741387A Pending JPS6441932A (en) 1987-08-07 1987-08-07 Data processing control system

Country Status (1)

Country Link
JP (1) JPS6441932A (en)

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