JPS56155448A - Information processor - Google Patents

Information processor

Info

Publication number
JPS56155448A
JPS56155448A JP5974580A JP5974580A JPS56155448A JP S56155448 A JPS56155448 A JP S56155448A JP 5974580 A JP5974580 A JP 5974580A JP 5974580 A JP5974580 A JP 5974580A JP S56155448 A JPS56155448 A JP S56155448A
Authority
JP
Japan
Prior art keywords
instruction
branch
condition code
address
condition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5974580A
Other languages
Japanese (ja)
Inventor
Kozo Yamano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5974580A priority Critical patent/JPS56155448A/en
Publication of JPS56155448A publication Critical patent/JPS56155448A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution

Abstract

PURPOSE:To reduce the load of the system to improve the performance, by preventing the read for the instruction of the branch destination address when the condition code, which determines the branch condition, indicates no branch in the advanced control system. CONSTITUTION:In case that the conditional branch instruction which branches to address Y at the time of minus of the operation result and does not branch in other cases is executed in the advanced control system, the condition code due to execution of the instruction of three or more before the conditional branch instruction is stored in condition code register 6 when this conditional branch instruction enters into the instruction register, and the instruction of one or two before is being decoded at this time, and 1 is stored in the second and the third bits of shift register 22 if this instruction is decoded to have no influence upon the conditional branch instruction; and when the condition code of condition code register 6 is 0, AND circuit 27 outputs the output to access the address Y of cash memory 3. Consequently, since the branch address is accessed only when the branch condition is satisfied, the wasteful load is not applied to the system.
JP5974580A 1980-05-06 1980-05-06 Information processor Pending JPS56155448A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5974580A JPS56155448A (en) 1980-05-06 1980-05-06 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5974580A JPS56155448A (en) 1980-05-06 1980-05-06 Information processor

Publications (1)

Publication Number Publication Date
JPS56155448A true JPS56155448A (en) 1981-12-01

Family

ID=13122070

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5974580A Pending JPS56155448A (en) 1980-05-06 1980-05-06 Information processor

Country Status (1)

Country Link
JP (1) JPS56155448A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62159230A (en) * 1986-01-07 1987-07-15 Nec Corp Instruction prefetching device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62159230A (en) * 1986-01-07 1987-07-15 Nec Corp Instruction prefetching device

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