JPS647130A - Instruction prefetch method for memory system - Google Patents

Abstract

PURPOSE:To reduce the time loss due to success in jump at the time of execution of a conditional jump instruction by providing a jump register in which the address after success in conditional jump is stored, a prefetch register in which the next instruction address is stored, and a quick buffer memory. CONSTITUTION:When a conditional jump signal 48 from a processor 8 comes, the address of a prefetch register 10 and that of a jump register 12 are distributed to an external memory 2 and a buffer memory by this information and access is performed. If the conditional jump signal does not come, the instruction address from the prefetch register 10 is outputted to the external memory 2 and the buffer memory 4 and access is performed. When an instruction to be executed exists in the buffer memory 4, its instruction data is selected and outputted to the processor 8 by an instruction selector 16; but if it does not exist there, instruction data from the external memory 2 is outputted to the processor 8.