JPS5737795A - Read-only memory element - Google Patents

Read-only memory element

Info

Publication number
JPS5737795A
JPS5737795A JP11317580A JP11317580A JPS5737795A JP S5737795 A JPS5737795 A JP S5737795A JP 11317580 A JP11317580 A JP 11317580A JP 11317580 A JP11317580 A JP 11317580A JP S5737795 A JPS5737795 A JP S5737795A
Authority
JP
Japan
Prior art keywords
address
read
data
address register
generated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11317580A
Other languages
Japanese (ja)
Inventor
Isao Uchida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11317580A priority Critical patent/JPS5737795A/en
Publication of JPS5737795A publication Critical patent/JPS5737795A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:To extend an access time and to reduce a program load for address specification, by providing a read-only memory element with a memory address register which increases automatically. CONSTITUTION:According to addresses stored in an address register 6, data are read out of a memory cell matrix 2 by an address decoder 1, and then outputted to data terminals D0-D7 through a data output buffer 3 by a data output control signal 11 generated by a writing-reading control circuit 7. As a readout indication signal is ceased, an address count signal 10 is generated and applied to the address register 6, whose contents, i.e., address increases by one. Consequently, data in successive addresses are read without external operation.
JP11317580A 1980-08-18 1980-08-18 Read-only memory element Pending JPS5737795A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11317580A JPS5737795A (en) 1980-08-18 1980-08-18 Read-only memory element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11317580A JPS5737795A (en) 1980-08-18 1980-08-18 Read-only memory element

Publications (1)

Publication Number Publication Date
JPS5737795A true JPS5737795A (en) 1982-03-02

Family

ID=14605446

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11317580A Pending JPS5737795A (en) 1980-08-18 1980-08-18 Read-only memory element

Country Status (1)

Country Link
JP (1) JPS5737795A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61104386A (en) * 1984-10-25 1986-05-22 アメリカン　マイクロシステムズ，インコーポレイテツド Writable cmos circuit for chip enable and output enable determined by user
JPS621047A (en) * 1985-02-14 1987-01-07 Nec Corp Semiconductor device containing memory circuit
US11017808B2 (en) 2015-11-12 2021-05-25 Sony Corporation Fractionation method for magnetic recording-magnetic powder, fractionation apparatus for magnetic recording-magnetic powder, and method of producing magnetic recording medium

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61104386A (en) * 1984-10-25 1986-05-22 アメリカン　マイクロシステムズ，インコーポレイテツド Writable cmos circuit for chip enable and output enable determined by user
JPS621047A (en) * 1985-02-14 1987-01-07 Nec Corp Semiconductor device containing memory circuit
US11017808B2 (en) 2015-11-12 2021-05-25 Sony Corporation Fractionation method for magnetic recording-magnetic powder, fractionation apparatus for magnetic recording-magnetic powder, and method of producing magnetic recording medium

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