DE60225426T2 - Fraktional-n-frequenzsynthesizer mit fraktional-kompensationsverfahren - Google Patents

Fraktional-n-frequenzsynthesizer mit fraktional-kompensationsverfahren Download PDF

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Publication number
DE60225426T2
DE60225426T2 DE60225426T DE60225426T DE60225426T2 DE 60225426 T2 DE60225426 T2 DE 60225426T2 DE 60225426 T DE60225426 T DE 60225426T DE 60225426 T DE60225426 T DE 60225426T DE 60225426 T2 DE60225426 T2 DE 60225426T2
Authority
DE
Germany
Prior art keywords
signal
phase
locked loop
output
loop according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60225426T
Other languages
German (de)
English (en)
Other versions
DE60225426D1 (de
Inventor
Hyungki Sungdong Gu HUH
Eunseok Song
Kang Yoon Youngdeungpo Gu LEE
Yido Seocho Gu KOO
Jeongwoo Lee
Joonbae Park
Kyeongho Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GCT Semiconductor Inc
Original Assignee
GCT Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/940,807 external-priority patent/US6553089B2/en
Priority claimed from US09/940,808 external-priority patent/US6704383B2/en
Application filed by GCT Semiconductor Inc filed Critical GCT Semiconductor Inc
Application granted granted Critical
Publication of DE60225426D1 publication Critical patent/DE60225426D1/de
Publication of DE60225426T2 publication Critical patent/DE60225426T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H03L7/0895—Details of the current generators
    • H03L7/0898—Details of the current generators the source or sink current values being variable
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Transmitters (AREA)
DE60225426T 2001-03-20 2002-03-20 Fraktional-n-frequenzsynthesizer mit fraktional-kompensationsverfahren Expired - Fee Related DE60225426T2 (de)

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
US940808 1997-09-30
US27691201P 2001-03-20 2001-03-20
US27692701P 2001-03-20 2001-03-20
US276927P 2001-03-20
US276912P 2001-03-20
US09/940,807 US6553089B2 (en) 2001-03-20 2001-08-29 Fractional-N frequency synthesizer with fractional compensation method
US09/940,808 US6704383B2 (en) 2001-03-20 2001-08-29 Sample and hold type fractional-N frequency synthesizer
US940807 2001-08-29
PCT/US2002/008297 WO2002076009A1 (en) 2001-03-20 2002-03-20 Fractional-n frequency synthesizer with fractional compensation method

Publications (2)

Publication Number Publication Date
DE60225426D1 DE60225426D1 (de) 2008-04-17
DE60225426T2 true DE60225426T2 (de) 2009-03-12

Family

ID=27501176

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60225426T Expired - Fee Related DE60225426T2 (de) 2001-03-20 2002-03-20 Fraktional-n-frequenzsynthesizer mit fraktional-kompensationsverfahren

Country Status (8)

Country Link
EP (1) EP1371167B1 (enExample)
JP (1) JP4216075B2 (enExample)
KR (1) KR100880422B1 (enExample)
CN (1) CN100341269C (enExample)
AT (1) ATE388541T1 (enExample)
CA (1) CA2442721A1 (enExample)
DE (1) DE60225426T2 (enExample)
WO (1) WO2002076009A1 (enExample)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7747237B2 (en) 2004-04-09 2010-06-29 Skyworks Solutions, Inc. High agility frequency synthesizer phase-locked loop
US20060267644A1 (en) * 2005-05-24 2006-11-30 Edward Youssoufian Method and apparatus for loop filter size reduction
KR100830898B1 (ko) * 2006-09-15 2008-05-22 한국과학기술원 전압 제어 발진기의 출력 클럭으로 동작하는 스위치드커패시터 네트워크를 이용한 위상 고정 루프 및 제어방법
KR101030950B1 (ko) * 2008-02-29 2011-04-28 주식회사 코아로직 듀얼 모드 위성 신호 수신 장치 및 위성 신호 수신 방법
GB0804341D0 (en) * 2008-03-07 2008-04-16 Cambridge Silicon Radio Ltd Charge pump for a phase-locked loop
GB0804340D0 (en) * 2008-03-07 2008-04-16 Cambridge Silicon Radio Ltd Charge pump for a phase-locked loop
GB0804339D0 (en) 2008-03-07 2008-04-16 Cambridge Silicon Radio Ltd Phase-locked loop
GB0804342D0 (en) * 2008-03-07 2008-04-16 Cambridge Silicon Radio Ltd Charge transfer in a phase-locked loop
JP5229081B2 (ja) 2009-04-10 2013-07-03 富士通株式会社 半導体装置
EP2369745B1 (en) * 2010-03-25 2015-04-15 Silicon Laboratories Inc. Method and apparatus for quantization noise reduction in fractional-N PLLS
US9019016B2 (en) 2011-05-18 2015-04-28 Asahi Kasei Microdevices Corporation Accumulator-type fractional N-PLL synthesizer and control method thereof
WO2014006654A1 (ja) * 2012-07-04 2014-01-09 ルネサスエレクトロニクス株式会社 半導体装置
US9106211B2 (en) * 2013-03-13 2015-08-11 Infineon Technologies Austria Ag System and method for an oversampled data converter
US9559707B2 (en) * 2014-10-23 2017-01-31 Lattice Semiconductor Corporation Phase locked loop with sub-harmonic locking prevention functionality
JP6720769B2 (ja) * 2016-08-18 2020-07-08 富士通株式会社 信号再生回路、電子装置及び信号再生方法
US10855294B2 (en) * 2016-11-08 2020-12-01 Texas Instruments Incorporated High linearity phase interpolator
CN108736894B (zh) * 2017-04-18 2021-08-06 博通集成电路（上海）股份有限公司 分数n频率合成器及其方法
DE102017117900A1 (de) * 2017-08-07 2019-02-07 Endress+Hauser SE+Co. KG Hochfrequenz-Signalerzeugungseinheit
CN108566201A (zh) * 2018-07-24 2018-09-21 成都意科科技有限责任公司 一种高频率分辨率脉冲数字发生系统
CN117559993B (zh) * 2023-11-22 2024-12-13 中国科学技术大学 一种电荷舵数字鉴相器及其电荷舵采样全数字锁相环

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US4868513A (en) * 1987-09-11 1989-09-19 Amdahl Corporation Phase-locked loop with redundant reference input
US5142246A (en) * 1991-06-19 1992-08-25 Telefonaktiebolaget L M Ericsson Multi-loop controlled VCO
US5491439A (en) * 1994-08-31 1996-02-13 International Business Machines Corporation Method and apparatus for reducing jitter in a phase locked loop circuit
US5815016A (en) * 1994-09-02 1998-09-29 Xilinx, Inc. Phase-locked delay loop for clock correction
FI97579C (fi) * 1995-04-04 1997-01-10 Nokia Telecommunications Oy Vaihelukitun silmukan silmukkasuodatin
JPH09172370A (ja) * 1995-12-19 1997-06-30 Toshiba Corp Ｐｌｌ回路
US5953386A (en) * 1996-06-20 1999-09-14 Lsi Logic Corporation High speed clock recovery circuit using complimentary dividers
US5838205A (en) * 1997-02-18 1998-11-17 International Business Machines Corporation Variable-speed phase-locked loop system with on-the-fly switching and method therefor
US6100767A (en) * 1997-09-29 2000-08-08 Sanyo Electric Co., Ltd. Phase-locked loop with improved trade-off between lock-up time and power dissipation
US6137372A (en) * 1998-05-29 2000-10-24 Silicon Laboratories Inc. Method and apparatus for providing coarse and fine tuning control for synthesizing high-frequency signals for wireless communications
US6147561A (en) * 1999-07-29 2000-11-14 Conexant Systems, Inc. Phase/frequency detector with time-delayed inputs in a charge pump based phase locked loop and a method for enhancing the phase locked loop gain

Also Published As

Publication number Publication date
KR100880422B1 (ko) 2009-01-29
WO2002076009A1 (en) 2002-09-26
ATE388541T1 (de) 2008-03-15
HK1064831A1 (en) 2005-02-04
EP1371167A4 (en) 2005-07-13
CA2442721A1 (en) 2002-09-26
CN1507717A (zh) 2004-06-23
EP1371167B1 (en) 2008-03-05
JP2004530334A (ja) 2004-09-30
JP4216075B2 (ja) 2009-01-28
CN100341269C (zh) 2007-10-03
KR20040007473A (ko) 2004-01-24
DE60225426D1 (de) 2008-04-17
EP1371167A1 (en) 2003-12-17

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8339 Ceased/non-payment of the annual fee