DE60206223T2 - Verfahren und Anordnung zum Schreiben eines Speichers - Google Patents
Verfahren und Anordnung zum Schreiben eines Speichers Download PDFInfo
- Publication number
- DE60206223T2 DE60206223T2 DE60206223T DE60206223T DE60206223T2 DE 60206223 T2 DE60206223 T2 DE 60206223T2 DE 60206223 T DE60206223 T DE 60206223T DE 60206223 T DE60206223 T DE 60206223T DE 60206223 T2 DE60206223 T2 DE 60206223T2
- Authority
- DE
- Germany
- Prior art keywords
- output
- pulse train
- pulse
- memory cell
- generator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000015654 memory Effects 0.000 title claims description 57
- 238000000034 method Methods 0.000 title claims description 22
- 230000008569 process Effects 0.000 claims description 6
- 238000001514 detection method Methods 0.000 claims 1
- 238000012544 monitoring process Methods 0.000 description 10
- 230000004888 barrier function Effects 0.000 description 9
- 239000004020 conductor Substances 0.000 description 6
- 230000015556 catabolic process Effects 0.000 description 5
- 230000004044 response Effects 0.000 description 5
- 239000012212 insulator Substances 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000005641 tunneling Effects 0.000 description 3
- 230000000295 complement effect Effects 0.000 description 2
- 230000000977 initiatory effect Effects 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 229910003321 CoFe Inorganic materials 0.000 description 1
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000002238 attenuated effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000000696 magnetic material Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000007619 statistical method Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/1084—Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
Landscapes
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US908901 | 2001-07-20 | ||
| US09/908,901 US6434048B1 (en) | 2001-07-20 | 2001-07-20 | Pulse train writing of worm storage device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE60206223D1 DE60206223D1 (de) | 2006-02-02 |
| DE60206223T2 true DE60206223T2 (de) | 2006-08-03 |
Family
ID=25426385
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE60206223T Expired - Lifetime DE60206223T2 (de) | 2001-07-20 | 2002-07-18 | Verfahren und Anordnung zum Schreiben eines Speichers |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US6434048B1 (cg-RX-API-DMAC7.html) |
| EP (1) | EP1278203B1 (cg-RX-API-DMAC7.html) |
| JP (1) | JP4034135B2 (cg-RX-API-DMAC7.html) |
| KR (1) | KR20030009211A (cg-RX-API-DMAC7.html) |
| CN (1) | CN100392756C (cg-RX-API-DMAC7.html) |
| DE (1) | DE60206223T2 (cg-RX-API-DMAC7.html) |
| TW (1) | TWI277097B (cg-RX-API-DMAC7.html) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6434060B1 (en) * | 2001-07-31 | 2002-08-13 | Hewlett-Packard Company | Write pulse limiting for worm storage device |
| US7085154B2 (en) * | 2003-06-03 | 2006-08-01 | Samsung Electronics Co., Ltd. | Device and method for pulse width control in a phase change memory device |
| US7132350B2 (en) * | 2003-07-21 | 2006-11-07 | Macronix International Co., Ltd. | Method for manufacturing a programmable eraseless memory |
| US20050035429A1 (en) * | 2003-08-15 | 2005-02-17 | Yeh Chih Chieh | Programmable eraseless memory |
| JP5015420B2 (ja) * | 2003-08-15 | 2012-08-29 | 旺宏電子股▲ふん▼有限公司 | プログラマブル消去不要メモリに対するプログラミング方法 |
| KR100634384B1 (ko) * | 2004-07-16 | 2006-10-16 | 삼성전자주식회사 | 액세스 데이터를 저장하는 회로를 구비한 반도체 메모리 장치 |
| JP4735948B2 (ja) * | 2005-03-29 | 2011-07-27 | 日本電気株式会社 | 磁気ランダムアクセスメモリ及びその動作方法 |
| JP5191628B2 (ja) * | 2005-03-31 | 2013-05-08 | ヤマハ株式会社 | 半導体装置構造および半導体装置の製造方法 |
| JP2006286723A (ja) * | 2005-03-31 | 2006-10-19 | Yamaha Corp | 半導体装置および同装置におけるヒューズ素子の切断方法 |
| US7292466B2 (en) * | 2006-01-03 | 2007-11-06 | Infineon Technologies Ag | Integrated circuit having a resistive memory |
| JP4893050B2 (ja) * | 2006-03-23 | 2012-03-07 | ヤマハ株式会社 | ヒューズ素子の切断ないし高抵抗化方法 |
| TWI430275B (zh) * | 2008-04-16 | 2014-03-11 | Magnachip Semiconductor Ltd | 用於程式化非揮發性記憶體裝置之方法 |
| KR101114061B1 (ko) * | 2009-02-23 | 2012-02-21 | 주식회사 포스포 | 형광체 및 발광소자 |
| JP4774109B2 (ja) * | 2009-03-13 | 2011-09-14 | シャープ株式会社 | 不揮発性可変抵抗素子のフォーミング処理の制御回路、並びにフォーミング処理の制御方法 |
| US8023307B1 (en) * | 2010-04-30 | 2011-09-20 | Hewlett-Packard Development Company, L.P. | Peripheral signal handling in extensible three dimensional circuits |
| US8427857B2 (en) * | 2010-05-06 | 2013-04-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Electrical fuse programming time control scheme |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US500855A (en) * | 1893-07-04 | Boiler | ||
| US4631701A (en) | 1983-10-31 | 1986-12-23 | Ncr Corporation | Dynamic random access memory refresh control system |
| US4740924A (en) * | 1985-02-25 | 1988-04-26 | Siemens Aktiengesellschaft | Circuit arrangement comprising a matrix-shaped memory arrangement for variably adjustable time delay of digital signals |
| EP0206743A3 (en) * | 1985-06-20 | 1990-04-25 | Texas Instruments Incorporated | Zero fall-through time asynchronous fifo buffer with nonambiguous empty/full resolution |
| US5008855A (en) * | 1989-07-18 | 1991-04-16 | Actel Corporation | Method of programming anti-fuse element |
| US5075571A (en) | 1991-01-02 | 1991-12-24 | International Business Machines Corp. | PMOS wordline boost cricuit for DRAM |
| US5257225A (en) * | 1992-03-12 | 1993-10-26 | Micron Technology, Inc. | Method for programming programmable devices by utilizing single or multiple pulses varying in pulse width and amplitude |
| JPH05283708A (ja) | 1992-04-02 | 1993-10-29 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置，その製造方法および試験方法 |
| US5469559A (en) | 1993-07-06 | 1995-11-21 | Dell Usa, L.P. | Method and apparatus for refreshing a selected portion of a dynamic random access memory |
| JPH0778484A (ja) | 1993-07-13 | 1995-03-20 | Nkk Corp | 記憶素子、不揮発性メモリ、不揮発性記憶装置及びそれを用いた情報記憶方法 |
| US5471040A (en) | 1993-11-15 | 1995-11-28 | May; George | Capacitive data card system |
| US5502395A (en) * | 1994-05-25 | 1996-03-26 | Allen; William J. | Method for programming antifuses for reliable programmed links |
| US5684732A (en) * | 1995-03-24 | 1997-11-04 | Kawasaki Steel Corporation | Semiconductor devices |
| US5684741A (en) | 1995-12-26 | 1997-11-04 | Intel Corporation | Auto-verification of programming flash memory cells |
| KR100363108B1 (ko) * | 1998-12-30 | 2003-02-20 | 주식회사 하이닉스반도체 | 반도체 메모리장치와 그 장치의 리프레쉬주기 조절방법 |
| KR100322470B1 (ko) | 1999-07-22 | 2002-02-07 | 윤종용 | 고밀도 노어형 플래시 메모리 장치 및 그것의 프로그램 방법 |
-
2001
- 2001-07-20 US US09/908,901 patent/US6434048B1/en not_active Expired - Lifetime
-
2002
- 2002-06-03 TW TW091111872A patent/TWI277097B/zh not_active IP Right Cessation
- 2002-07-09 JP JP2002200114A patent/JP4034135B2/ja not_active Expired - Fee Related
- 2002-07-18 EP EP02255051A patent/EP1278203B1/en not_active Expired - Lifetime
- 2002-07-18 DE DE60206223T patent/DE60206223T2/de not_active Expired - Lifetime
- 2002-07-19 KR KR1020020042439A patent/KR20030009211A/ko not_active Ceased
- 2002-07-19 CN CNB021265291A patent/CN100392756C/zh not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| EP1278203B1 (en) | 2005-09-21 |
| US6434048B1 (en) | 2002-08-13 |
| JP2003109393A (ja) | 2003-04-11 |
| JP4034135B2 (ja) | 2008-01-16 |
| CN1399274A (zh) | 2003-02-26 |
| DE60206223D1 (de) | 2006-02-02 |
| EP1278203A1 (en) | 2003-01-22 |
| TWI277097B (en) | 2007-03-21 |
| CN100392756C (zh) | 2008-06-04 |
| KR20030009211A (ko) | 2003-01-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8327 | Change in the person/name/address of the patent owner |
Owner name: HEWLETT-PACKARD DEVELOPMENT CO., L.P., HOUSTON, TE |
|
| 8364 | No opposition during term of opposition |