DE602006012215D1 - Verfahren zur herstellung selbstausgerichteter schottky-dioden für halbleiterbauelemente - Google Patents
Verfahren zur herstellung selbstausgerichteter schottky-dioden für halbleiterbauelementeInfo
- Publication number
- DE602006012215D1 DE602006012215D1 DE602006012215T DE602006012215T DE602006012215D1 DE 602006012215 D1 DE602006012215 D1 DE 602006012215D1 DE 602006012215 T DE602006012215 T DE 602006012215T DE 602006012215 T DE602006012215 T DE 602006012215T DE 602006012215 D1 DE602006012215 D1 DE 602006012215D1
- Authority
- DE
- Germany
- Prior art keywords
- junction
- aligned
- self
- semiconductor components
- schottky diodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 3
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 abstract 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 125000006850 spacer group Chemical group 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66636—Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/66583—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with initial gate mask or masking layer complementary to the prospective gate location, e.g. with dummy source and drain contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66643—Lateral single gate silicon transistors with source or drain regions formed by a Schottky barrier or a conductor-insulator-semiconductor structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7839—Field effect transistors with field effect produced by an insulated gate with Schottky drain or source contact
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Light Receiving Elements (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05300971 | 2005-11-28 | ||
PCT/IB2006/054446 WO2007060641A1 (en) | 2005-11-28 | 2006-11-27 | Method of fabricating self aligned schottky junctions for semiconductors devices |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602006012215D1 true DE602006012215D1 (de) | 2010-03-25 |
Family
ID=37865896
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602006012215T Active DE602006012215D1 (de) | 2005-11-28 | 2006-11-27 | Verfahren zur herstellung selbstausgerichteter schottky-dioden für halbleiterbauelemente |
Country Status (7)
Country | Link |
---|---|
US (1) | US7884002B2 (de) |
EP (1) | EP1958244B1 (de) |
JP (1) | JP5001295B2 (de) |
CN (1) | CN101317253B (de) |
AT (1) | ATE457525T1 (de) |
DE (1) | DE602006012215D1 (de) |
WO (1) | WO2007060641A1 (de) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2931294B1 (fr) * | 2008-05-13 | 2010-09-03 | Commissariat Energie Atomique | Procede de realisation d'un transistor a source et drain metalliques |
US7989824B2 (en) * | 2009-06-03 | 2011-08-02 | Koninklijke Philips Electronics N.V. | Method of forming a dielectric layer on a semiconductor light emitting device |
FR2947384B1 (fr) * | 2009-06-25 | 2012-03-30 | Commissariat Energie Atomique | Procede de realisation d'un transistor a source et drain metalliques |
FR2976122A1 (fr) * | 2011-05-31 | 2012-12-07 | St Microelectronics Crolles 2 | Transistor mosfet, composant incluant plusieurs tels transistors et procede de fabrication |
KR101873911B1 (ko) | 2011-06-07 | 2018-07-04 | 삼성전자주식회사 | 콘택 구조체를 포함하는 반도체 소자와 그 제조방법, 및 그것을 포함하는 전자 시스템 |
EP2913850B1 (de) * | 2012-10-23 | 2018-09-12 | Olympus Corporation | Bildaufnahmevorrichtung und endoskop |
CN103745929A (zh) * | 2013-12-24 | 2014-04-23 | 上海新傲科技股份有限公司 | 肖特基势垒mosfet的制备方法 |
WO2015142357A1 (en) | 2014-03-21 | 2015-09-24 | Intel Corporation | Techniques for integration of ge-rich p-mos source/drain contacts |
DE102016119799B4 (de) | 2016-10-18 | 2020-08-06 | Infineon Technologies Ag | Integrierte schaltung, die einen vergrabenen hohlraum enthält, und herstellungsverfahren |
CN112864116B (zh) * | 2019-11-27 | 2024-06-04 | 华邦电子股份有限公司 | 半导体元件及其制造方法 |
CN112018076A (zh) * | 2020-07-28 | 2020-12-01 | 中国科学院微电子研究所 | 一种半导体结构及其制备方法 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0763095B2 (ja) * | 1986-04-09 | 1995-07-05 | 株式会社東芝 | 半導体装置 |
JPH02188967A (ja) * | 1989-01-18 | 1990-07-25 | Nissan Motor Co Ltd | 半導体装置 |
JP3444931B2 (ja) * | 1993-08-25 | 2003-09-08 | 株式会社日立製作所 | 半導体装置及びその製造方法 |
JPH0974188A (ja) * | 1995-09-05 | 1997-03-18 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
JPH09312391A (ja) * | 1996-05-22 | 1997-12-02 | Toshiba Corp | 半導体装置およびその製造方法 |
JPH10233451A (ja) * | 1997-02-21 | 1998-09-02 | Fujitsu Ltd | 半導体装置の製造方法 |
TW439102B (en) * | 1998-12-02 | 2001-06-07 | Nippon Electric Co | Field effect transistor and method of manufacturing the same |
US6479843B2 (en) * | 2000-04-27 | 2002-11-12 | Motorola, Inc. | Single supply HFET with temperature compensation |
JP3833903B2 (ja) * | 2000-07-11 | 2006-10-18 | 株式会社東芝 | 半導体装置の製造方法 |
US20020155721A1 (en) * | 2001-04-03 | 2002-10-24 | Macronix International Co., Ltd | Method of forming shallow trench isolation structure |
KR100434697B1 (ko) * | 2001-09-05 | 2004-06-07 | 주식회사 하이닉스반도체 | 반도체소자의 제조방법 |
CN1206711C (zh) * | 2002-03-28 | 2005-06-15 | 华邦电子股份有限公司 | 金属-氧化物-半导体晶体管的自对准硅化物的制备方法 |
DE102004012630A1 (de) * | 2004-03-16 | 2005-06-30 | Infineon Technologies Ag | Feldeffekttransistor mit geringem Leckstrom und Verfahren zu seiner Herstellung |
JP3910971B2 (ja) * | 2004-03-26 | 2007-04-25 | 株式会社東芝 | 電界効果トランジスタ |
JP2006054423A (ja) * | 2004-07-13 | 2006-02-23 | Toshiba Corp | 半導体装置及びその製造方法 |
US20060252191A1 (en) * | 2005-05-03 | 2006-11-09 | Advanced Micro Devices, Inc. | Methodology for deposition of doped SEG for raised source/drain regions |
-
2006
- 2006-11-27 US US12/095,144 patent/US7884002B2/en active Active
- 2006-11-27 CN CN2006800440611A patent/CN101317253B/zh not_active Expired - Fee Related
- 2006-11-27 JP JP2008541898A patent/JP5001295B2/ja not_active Expired - Fee Related
- 2006-11-27 EP EP06831945A patent/EP1958244B1/de active Active
- 2006-11-27 AT AT06831945T patent/ATE457525T1/de not_active IP Right Cessation
- 2006-11-27 WO PCT/IB2006/054446 patent/WO2007060641A1/en active Application Filing
- 2006-11-27 DE DE602006012215T patent/DE602006012215D1/de active Active
Also Published As
Publication number | Publication date |
---|---|
WO2007060641A1 (en) | 2007-05-31 |
JP5001295B2 (ja) | 2012-08-15 |
ATE457525T1 (de) | 2010-02-15 |
US7884002B2 (en) | 2011-02-08 |
CN101317253A (zh) | 2008-12-03 |
EP1958244B1 (de) | 2010-02-10 |
US20080299715A1 (en) | 2008-12-04 |
CN101317253B (zh) | 2010-10-27 |
EP1958244A1 (de) | 2008-08-20 |
JP2009517860A (ja) | 2009-04-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ATE457525T1 (de) | Verfahren zur herstellung selbstausgerichteter schottky-dioden für halbleiterbauelemente | |
TW200618120A (en) | A microelectronic device and method of fabricating the same | |
TW200603294A (en) | Method of making transistor with strained source/drain | |
WO2008005916A3 (en) | Method for making planar nanowire surround gate mosfet | |
WO2007029178A3 (en) | Method of manufacturing a semiconductor device with an isolation region and a device manufactured by the method | |
TW200629418A (en) | Method of making a double gate semiconductor device with self-aligned gates and structure thereof | |
ATE511214T1 (de) | Mosfet mit schottky source und drain kontakten und verfahren zur herstellung | |
GB2383190B (en) | Bipolar junction transistor compatible with vertical replacement gate transistors | |
ATE441938T1 (de) | Herstellungsverfahren für finfets mit verringertem widerstand | |
JP2009514247A5 (de) | ||
JP2006270107A5 (de) | ||
JP2007142417A5 (de) | ||
ATE549748T1 (de) | Verfahren zur herstellung eines dual-gate fet | |
WO2007069151A3 (en) | Field effect transistor structure with an insulating layer at the junction | |
ATE535020T1 (de) | Verfahren zur herstellung einer halbleiteranordnung mit übergang | |
TW200743157A (en) | Method of fabricating metal oxide semiconductor | |
CN107634092B (zh) | 一种锗硅源漏极及其制备方法 | |
DE602006001828D1 (de) | Verfahren zum Herstellen eines Transistors mit selbst justierten Doppel-Gates durch Schrumpfung der Gatestruktur | |
ATE389948T1 (de) | Verfahren zur herstellung einer halbleitervorrichtung | |
TW200735268A (en) | Method of fabricating semiconductor device | |
TW200721371A (en) | System and method for improving mesa width in a semiconductor device | |
JP2009206268A5 (de) | ||
JP2009520373A (ja) | シリコン・オン・インシュレータ装置におけるソースおよびドレイン形成 | |
JP2004133407A5 (de) | ||
JP2009520364A5 (de) |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |