FR2947384B1 - Procede de realisation d'un transistor a source et drain metalliques - Google Patents

Procede de realisation d'un transistor a source et drain metalliques

Info

Publication number
FR2947384B1
FR2947384B1 FR0954350A FR0954350A FR2947384B1 FR 2947384 B1 FR2947384 B1 FR 2947384B1 FR 0954350 A FR0954350 A FR 0954350A FR 0954350 A FR0954350 A FR 0954350A FR 2947384 B1 FR2947384 B1 FR 2947384B1
Authority
FR
France
Prior art keywords
drain
producing
metal source
source transistor
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR0954350A
Other languages
English (en)
Other versions
FR2947384A1 (fr
Inventor
Bernard Previtali
Thierry Poiroux
Maud Vinet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR0954350A priority Critical patent/FR2947384B1/fr
Priority to US12/796,282 priority patent/US8021986B2/en
Publication of FR2947384A1 publication Critical patent/FR2947384A1/fr
Application granted granted Critical
Publication of FR2947384B1 publication Critical patent/FR2947384B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/66772Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
    • H01L29/78648Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/914Doping
    • Y10S438/924To facilitate selective etching
FR0954350A 2009-06-25 2009-06-25 Procede de realisation d'un transistor a source et drain metalliques Active FR2947384B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0954350A FR2947384B1 (fr) 2009-06-25 2009-06-25 Procede de realisation d'un transistor a source et drain metalliques
US12/796,282 US8021986B2 (en) 2009-06-25 2010-06-08 Method for producing a transistor with metallic source and drain

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0954350A FR2947384B1 (fr) 2009-06-25 2009-06-25 Procede de realisation d'un transistor a source et drain metalliques

Publications (2)

Publication Number Publication Date
FR2947384A1 FR2947384A1 (fr) 2010-12-31
FR2947384B1 true FR2947384B1 (fr) 2012-03-30

Family

ID=41650187

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0954350A Active FR2947384B1 (fr) 2009-06-25 2009-06-25 Procede de realisation d'un transistor a source et drain metalliques

Country Status (2)

Country Link
US (1) US8021986B2 (fr)
FR (1) FR2947384B1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2976122A1 (fr) * 2011-05-31 2012-12-07 St Microelectronics Crolles 2 Transistor mosfet, composant incluant plusieurs tels transistors et procede de fabrication
US9859424B2 (en) * 2014-03-21 2018-01-02 Intel Corporation Techniques for integration of Ge-rich p-MOS source/drain contacts

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6080661A (en) * 1998-05-29 2000-06-27 Philips Electronics North America Corp. Methods for fabricating gate and diffusion contacts in self-aligned contact processes
KR100561960B1 (ko) * 2000-04-03 2006-03-21 도요 보세키 가부시키가이샤 공동 함유 폴리에스테르계 필름
FR2810157B1 (fr) * 2000-06-09 2002-08-16 Commissariat Energie Atomique Procede de realisation d'un composant electronique a source, drain et grille auto-allignes, en architecture damascene
US6686247B1 (en) 2002-08-22 2004-02-03 Intel Corporation Self-aligned contacts to gates
GB0316395D0 (en) 2003-07-12 2003-08-13 Hewlett Packard Development Co A transistor device with metallic electrodes and a method for use in forming such a device
EP1650796A3 (fr) * 2004-10-20 2010-12-08 STMicroelectronics (Crolles 2) SAS Procédé de prise de contact sur une région d'un circuit intégré, en particulier sur les électrodes d'un transistor
US7648871B2 (en) * 2005-10-21 2010-01-19 International Business Machines Corporation Field effect transistors (FETS) with inverted source/drain metallic contacts, and method of fabricating same
FR2893762B1 (fr) 2005-11-18 2007-12-21 Commissariat Energie Atomique Procede de realisation de transistor a double grilles auto-alignees par reduction de motifs de grille
CN101317253B (zh) * 2005-11-28 2010-10-27 Nxp股份有限公司 用于半导体器件的自对准肖特基结的制造方法
US7470615B2 (en) * 2006-07-26 2008-12-30 International Business Machines Corporation Semiconductor structure with self-aligned device contacts
FR2915023B1 (fr) 2007-04-13 2009-07-17 St Microelectronics Crolles 2 Realisation de contacts auto-positionnes par epitaxie
US20090101972A1 (en) * 2007-10-17 2009-04-23 Gaines R Stockton Process for fabricating a field-effect transistor with doping segregation used in source and/or drain

Also Published As

Publication number Publication date
US8021986B2 (en) 2011-09-20
US20110003443A1 (en) 2011-01-06
FR2947384A1 (fr) 2010-12-31

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