DE602005007878D1 - Halbleiterspeicher - Google Patents

Halbleiterspeicher

Info

Publication number
DE602005007878D1
DE602005007878D1 DE602005007878T DE602005007878T DE602005007878D1 DE 602005007878 D1 DE602005007878 D1 DE 602005007878D1 DE 602005007878 T DE602005007878 T DE 602005007878T DE 602005007878 T DE602005007878 T DE 602005007878T DE 602005007878 D1 DE602005007878 D1 DE 602005007878D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005007878T
Other languages
English (en)
Inventor
Yoshiaki Okuyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE602005007878D1 publication Critical patent/DE602005007878D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40603—Arbitration, priority and concurrent access to memory cells for read/write or refresh operations
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40626—Temperature related aspects of refresh operations
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406—Refreshing of dynamic cells
    • G11C2211/4061—Calibration or ate or cycle tuning
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406—Refreshing of dynamic cells
    • G11C2211/4067—Refresh in standby or low power modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
DE602005007878T 2005-06-14 2005-10-25 Halbleiterspeicher Active DE602005007878D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005173866A JP4664126B2 (ja) 2005-06-14 2005-06-14 半導体メモリ

Publications (1)

Publication Number Publication Date
DE602005007878D1 true DE602005007878D1 (de) 2008-08-14

Family

ID=37198812

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005007878T Active DE602005007878D1 (de) 2005-06-14 2005-10-25 Halbleiterspeicher

Country Status (7)

Country Link
US (1) US7203114B2 (de)
EP (1) EP1734535B1 (de)
JP (1) JP4664126B2 (de)
KR (1) KR100648547B1 (de)
CN (1) CN100527270C (de)
DE (1) DE602005007878D1 (de)
TW (1) TWI269299B (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9384152B2 (en) 2010-02-23 2016-07-05 Rambus Inc. Coordinating memory operations using memory-device generated reference signals
US8717841B2 (en) * 2012-07-20 2014-05-06 Etron Technology, Inc. Method of controlling a refresh operation of PSRAM and related device
US10324833B2 (en) 2015-10-27 2019-06-18 Toshiba Memory Corporation Memory controller, data storage device, and memory control method
KR20190047451A (ko) * 2017-10-27 2019-05-08 에스케이하이닉스 주식회사 저항 변화 메모리 장치를 구비한 반도체 메모리 시스템 및 그 구동 방법
JP2020035501A (ja) * 2018-08-28 2020-03-05 キオクシア株式会社 メモリシステム及びストレージシステム
CN114974343A (zh) * 2021-02-24 2022-08-30 华邦电子股份有限公司 半导体存储装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63241790A (ja) 1987-03-28 1988-10-07 Nec Corp 可変リフレツシユ周期を有するｄｒａｍ
JPH01267896A (ja) * 1988-04-19 1989-10-25 Toshiba Corp 半導体メモリ
JP2928263B2 (ja) * 1989-03-20 1999-08-03 株式会社日立製作所 半導体装置
KR940008147B1 (ko) * 1991-11-25 1994-09-03 삼성전자 주식회사 저전력 데이타 리텐션 기능을 가지는 반도체 메모리장치
JPH05189960A (ja) * 1992-01-10 1993-07-30 Sharp Corp 半導体記憶装置
JPH08138374A (ja) * 1994-11-10 1996-05-31 Nec Corp 半導体メモリ装置およびそのリフレッシュ方法
US5737748A (en) * 1995-03-15 1998-04-07 Texas Instruments Incorporated Microprocessor unit having a first level write-through cache memory and a smaller second-level write-back cache memory
US5870345A (en) * 1997-09-04 1999-02-09 Siemens Aktiengesellschaft Temperature independent oscillator
JP2000163955A (ja) * 1998-11-30 2000-06-16 Matsushita Electric Ind Co Ltd リフレッシュタイマー及びそのリフレッシュ周期の調整方法
JP2003007054A (ja) * 2001-06-15 2003-01-10 Sharp Corp 半導体記憶装置
JP2003030983A (ja) 2001-07-13 2003-01-31 Mitsubishi Electric Corp ダイナミック型半導体記憶装置
CN100550197C (zh) * 2002-09-20 2009-10-14 富士通微电子株式会社 半导体存储器
AU2003235106A1 (en) * 2003-04-23 2004-11-19 Fujitsu Limited Semiconductor memory
JP4282408B2 (ja) * 2003-08-22 2009-06-24 Ｎｅｃエレクトロニクス株式会社 半導体記憶装置
JP3809871B2 (ja) * 2003-10-24 2006-08-16 インターナショナル・ビジネス・マシーンズ・コーポレーション オシレータ

Also Published As

Publication number Publication date
JP2006351066A (ja) 2006-12-28
TW200643954A (en) 2006-12-16
US20060280015A1 (en) 2006-12-14
CN100527270C (zh) 2009-08-12
TWI269299B (en) 2006-12-21
JP4664126B2 (ja) 2011-04-06
EP1734535A1 (de) 2006-12-20
EP1734535B1 (de) 2008-07-02
KR100648547B1 (ko) 2006-11-24
CN1881467A (zh) 2006-12-20
US7203114B2 (en) 2007-04-10

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU MICROELECTRONICS LTD., TOKYO, JP

8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU SEMICONDUCTOR LTD., YOKOHAMA, KANAGAWA, JP

8328 Change in the person/name/address of the agent

Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE