DE602004032198D1 - Herstellung von Luftspalten um eine Verbindungsleitung herum - Google Patents
Herstellung von Luftspalten um eine Verbindungsleitung herumInfo
- Publication number
- DE602004032198D1 DE602004032198D1 DE602004032198T DE602004032198T DE602004032198D1 DE 602004032198 D1 DE602004032198 D1 DE 602004032198D1 DE 602004032198 T DE602004032198 T DE 602004032198T DE 602004032198 T DE602004032198 T DE 602004032198T DE 602004032198 D1 DE602004032198 D1 DE 602004032198D1
- Authority
- DE
- Germany
- Prior art keywords
- around
- production
- connecting line
- air gaps
- airgaps
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/764—Air gaps
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02167—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
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- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31633—Deposition of carbon doped silicon oxide, e.g. SiOC
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76835—Combinations of two or more different dielectric layers having a low dielectric constant
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1005—Formation and after-treatment of dielectrics
- H01L2221/1052—Formation of thin functional dielectric layers
- H01L2221/1057—Formation of thin functional dielectric layers in via holes or trenches
- H01L2221/1063—Sacrificial or temporary thin dielectric films in openings in a dielectric
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
- Window Of Vehicle (AREA)
- Manufacturing Of Electrical Connectors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US50761303P | 2003-09-30 | 2003-09-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602004032198D1 true DE602004032198D1 (de) | 2011-05-26 |
Family
ID=34312477
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602004032198T Active DE602004032198D1 (de) | 2003-09-30 | 2004-09-30 | Herstellung von Luftspalten um eine Verbindungsleitung herum |
Country Status (5)
Country | Link |
---|---|
US (2) | US7078352B2 (de) |
EP (1) | EP1521302B1 (de) |
JP (1) | JP4864307B2 (de) |
AT (1) | ATE505813T1 (de) |
DE (1) | DE602004032198D1 (de) |
Families Citing this family (77)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102004003337A1 (de) * | 2004-01-22 | 2005-08-18 | Infineon Technologies Ag | Plasmaangeregtes chemisches Gasphasenabscheide-Verfahren, Silizium-Sauerstoff-Stickstoff-haltiges Material und Schicht-Anordnung |
US7088003B2 (en) * | 2004-02-19 | 2006-08-08 | International Business Machines Corporation | Structures and methods for integration of ultralow-k dielectrics with improved reliability |
US7622193B2 (en) * | 2004-08-18 | 2009-11-24 | Dow Corning Corporation | Coated substrates and methods for their preparation |
WO2007001337A2 (en) * | 2004-08-18 | 2007-01-04 | Dow Corning Corporation | Coated substrates and methods for their preparation |
DE102004050391B4 (de) * | 2004-10-15 | 2007-02-08 | Infineon Technologies Ag | Verfahren zum Herstellen einer Schicht-Anordnung und Schicht-Anordnung |
EP1764830B1 (de) * | 2005-09-16 | 2012-01-25 | Imec | Verfahren zum Herstellen von engen Graben in dielektrischen Materialien |
JP5214866B2 (ja) * | 2005-09-16 | 2013-06-19 | アイメック | 誘電性材料に狭いトレンチを形成する方法 |
BRPI0619341A2 (pt) * | 2005-11-14 | 2011-09-27 | Unilever Nv | emulsão óleo-em-água embalada estável à oxidação e método para a preparação de uma emulsão embalada |
US7994046B2 (en) * | 2006-01-27 | 2011-08-09 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming a dielectric layer with an air gap, and a structure including the dielectric layer with the air gap |
JP4735314B2 (ja) * | 2006-02-14 | 2011-07-27 | ソニー株式会社 | 半導体装置およびその製造方法 |
US7682977B2 (en) * | 2006-05-11 | 2010-03-23 | Micron Technology, Inc. | Methods of forming trench isolation and methods of forming arrays of FLASH memory cells |
US7803713B2 (en) * | 2006-09-21 | 2010-09-28 | Taiwan Semiconductor Manufacturing Co. Ltd. | Method for fabricating air gap for semiconductor device |
WO2008056295A1 (en) * | 2006-11-09 | 2008-05-15 | Nxp B.V. | A semiconductor device and a method of manufacturing thereof |
FR2910706B1 (fr) | 2006-12-21 | 2009-03-20 | Commissariat Energie Atomique | Element d'interconnexion a base de nanotubes de carbone |
KR100843233B1 (ko) * | 2007-01-25 | 2008-07-03 | 삼성전자주식회사 | 배선층의 양측벽에 인접하여 에어갭을 갖는 반도체 소자 및그 제조방법 |
US7871923B2 (en) * | 2007-01-26 | 2011-01-18 | Taiwan Semiconductor Maufacturing Company, Ltd. | Self-aligned air-gap in interconnect structures |
US20080185722A1 (en) * | 2007-02-05 | 2008-08-07 | Chung-Shi Liu | Formation process of interconnect structures with air-gaps and sidewall spacers |
US20080242118A1 (en) | 2007-03-29 | 2008-10-02 | International Business Machines Corporation | Methods for forming dense dielectric layer over porous dielectrics |
US7622390B2 (en) * | 2007-06-15 | 2009-11-24 | Tokyo Electron Limited | Method for treating a dielectric film to reduce damage |
KR100849773B1 (ko) * | 2007-06-29 | 2008-07-31 | 주식회사 하이닉스반도체 | 반도체 소자의 제조 방법 |
US20090081862A1 (en) * | 2007-09-24 | 2009-03-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Air gap structure design for advanced integrated circuit technology |
US7879683B2 (en) * | 2007-10-09 | 2011-02-01 | Applied Materials, Inc. | Methods and apparatus of creating airgap in dielectric layers for the reduction of RC delay |
US7868455B2 (en) * | 2007-11-01 | 2011-01-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Solving via-misalignment issues in interconnect structures having air-gaps |
JP2009135139A (ja) * | 2007-11-28 | 2009-06-18 | Toshiba Corp | 半導体装置及びその製造方法 |
FR2926397B1 (fr) | 2008-01-16 | 2010-02-12 | Commissariat Energie Atomique | Procede de fabrication de films dielectriques permeables |
US8071459B2 (en) | 2008-04-17 | 2011-12-06 | Freescale Semiconductor, Inc. | Method of sealing an air gap in a layer of a semiconductor structure and semiconductor structure |
KR101382564B1 (ko) | 2008-05-28 | 2014-04-10 | 삼성전자주식회사 | 에어갭을 갖는 층간 절연막의 형성 방법 |
US7754601B2 (en) * | 2008-06-03 | 2010-07-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor interconnect air gap formation process |
US7979824B2 (en) * | 2008-09-11 | 2011-07-12 | International Business Machines Corporation | Cost-benefit optimization for an airgapped integrated circuit |
US8108820B2 (en) * | 2008-09-11 | 2012-01-31 | International Business Machines Corporation | Enhanced conductivity in an airgapped integrated circuit |
JP5423029B2 (ja) * | 2009-02-12 | 2014-02-19 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
DE102009010845B4 (de) * | 2009-02-27 | 2016-10-13 | Advanced Micro Devices, Inc. | Verfahren zur Herstellung eines Mikrostrukturbauelements mit einer Metallisierungsstruktur mit selbstjustierten Luftspalten und wieder aufgefüllten Luftspaltausschließungszonen |
US8298911B2 (en) * | 2009-03-26 | 2012-10-30 | Samsung Electronics Co., Ltd. | Methods of forming wiring structures |
KR101536333B1 (ko) * | 2009-03-26 | 2015-07-14 | 삼성전자주식회사 | 배선 구조물 및 이의 형성 방법 |
JP2011009636A (ja) * | 2009-06-29 | 2011-01-13 | Oki Semiconductor Co Ltd | ビアホールの形成方法 |
US8304863B2 (en) | 2010-02-09 | 2012-11-06 | International Business Machines Corporation | Electromigration immune through-substrate vias |
US8456009B2 (en) | 2010-02-18 | 2013-06-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure having an air-gap region and a method of manufacturing the same |
US8709264B2 (en) | 2010-06-25 | 2014-04-29 | International Business Machines Corporation | Planar cavity MEMS and related structures, methods of manufacture and design structures |
DE102010030757B4 (de) | 2010-06-30 | 2019-03-28 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Verfahren zur Herstellung komplexer Metallisierungssysteme in Halbleitern durch Entfernung geschädigter dielektrischer Oberflächenschichten |
CN102330089B (zh) * | 2010-07-14 | 2013-07-17 | 中国科学院微电子研究所 | 硅片打孔系统及方法 |
US8497203B2 (en) | 2010-08-13 | 2013-07-30 | International Business Machines Corporation | Semiconductor structures and methods of manufacture |
US8530347B2 (en) | 2010-10-05 | 2013-09-10 | Freescale Semiconductor, Inc. | Electronic device including interconnects with a cavity therebetween and a process of forming the same |
KR20120061609A (ko) * | 2010-12-03 | 2012-06-13 | 삼성전자주식회사 | 집적회로 칩 및 이의 제조방법 |
EP2649005B1 (de) | 2010-12-07 | 2020-02-05 | SPTS Technologies Limited | Verfahren zur herstellung von elektromechanischen systemen |
US8975751B2 (en) * | 2011-04-22 | 2015-03-10 | Tessera, Inc. | Vias in porous substrates |
KR101828063B1 (ko) | 2011-05-17 | 2018-02-09 | 삼성전자주식회사 | 반도체 장치 및 그 형성방법 |
US8450212B2 (en) * | 2011-06-28 | 2013-05-28 | International Business Machines Corporation | Method of reducing critical dimension process bias differences between narrow and wide damascene wires |
CA2843415C (en) | 2011-07-29 | 2019-12-31 | University Of Saskatchewan | Polymer-based resonator antennas |
US20130069189A1 (en) * | 2011-09-20 | 2013-03-21 | United Microelectronics Corporation | Bonding pad structure and fabricating method thereof |
CN103094183B (zh) * | 2011-10-29 | 2015-07-29 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件的制造方法 |
CN103178000B (zh) * | 2011-12-20 | 2014-11-05 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件及其形成方法 |
US8603889B2 (en) | 2012-03-30 | 2013-12-10 | International Business Machines Corporation | Integrated circuit structure having air-gap trench isolation and related design structure |
US9105634B2 (en) * | 2012-06-29 | 2015-08-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Voids in interconnect structures and methods for forming the same |
CN103531524B (zh) * | 2012-07-02 | 2017-02-08 | 中芯国际集成电路制造(上海)有限公司 | 含有空气隙的互连结构的制备方法 |
KR101986126B1 (ko) | 2012-07-18 | 2019-06-05 | 삼성전자주식회사 | 비휘발성 메모리 소자 및 그 제조 방법 |
KR102054264B1 (ko) * | 2012-09-21 | 2019-12-10 | 삼성전자주식회사 | 반도체 소자 및 그의 제조 방법 |
CA2899236C (en) * | 2013-01-31 | 2023-02-14 | Atabak RASHIDIAN | Meta-material resonator antennas |
US8900989B2 (en) * | 2013-03-06 | 2014-12-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating an air gap using a damascene process and structure of same |
US9401329B2 (en) | 2013-03-12 | 2016-07-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interconnect structure and method of forming the same |
US9058983B2 (en) | 2013-06-17 | 2015-06-16 | International Business Machines Corporation | In-situ hardmask generation |
CN103325730A (zh) * | 2013-06-27 | 2013-09-25 | 上海华力微电子有限公司 | 介电常数可调的铜互连层间介质之制造方法 |
US10784583B2 (en) | 2013-12-20 | 2020-09-22 | University Of Saskatchewan | Dielectric resonator antenna arrays |
US9230911B2 (en) | 2013-12-30 | 2016-01-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interconnect structure and method of forming the same |
US9117822B1 (en) * | 2014-04-29 | 2015-08-25 | Globalfoundries Inc. | Methods and structures for back end of line integration |
US9583380B2 (en) | 2014-07-17 | 2017-02-28 | Globalfoundries Inc. | Anisotropic material damage process for etching low-K dielectric materials |
US9443956B2 (en) | 2014-12-08 | 2016-09-13 | Globalfoundries Inc. | Method for forming air gap structure using carbon-containing spacer |
US10170330B2 (en) * | 2014-12-09 | 2019-01-01 | Globalfoundries Inc. | Method for recessing a carbon-doped layer of a semiconductor structure |
US9390967B2 (en) | 2014-12-11 | 2016-07-12 | International Business Machines Corporation | Method for residue-free block pattern transfer onto metal interconnects for air gap formation |
US9768058B2 (en) | 2015-08-10 | 2017-09-19 | Globalfoundries Inc. | Methods of forming air gaps in metallization layers on integrated circuit products |
FR3040532B1 (fr) * | 2015-08-31 | 2017-10-13 | St Microelectronics Tours Sas | Puce a montage en surface |
US20170365504A1 (en) | 2016-06-20 | 2017-12-21 | Globalfoundries Inc. | Forming air gap |
US9768118B1 (en) * | 2016-09-19 | 2017-09-19 | International Business Machines Corporation | Contact having self-aligned air gap spacers |
US11527433B2 (en) * | 2016-09-30 | 2022-12-13 | Intel Corporation | Via and plug architectures for integrated circuit interconnects and methods of manufacture |
TWI766433B (zh) | 2018-02-28 | 2022-06-01 | 美商應用材料股份有限公司 | 形成氣隙的系統及方法 |
KR102594413B1 (ko) * | 2018-03-30 | 2023-10-27 | 삼성전자주식회사 | 반도체 장치 |
CN110858578B (zh) * | 2018-08-23 | 2021-07-13 | 联华电子股份有限公司 | 管芯封环及其制造方法 |
US11302641B2 (en) * | 2020-06-11 | 2022-04-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Self-aligned cavity strucutre |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6255156B1 (en) * | 1997-02-07 | 2001-07-03 | Micron Technology, Inc. | Method for forming porous silicon dioxide insulators and related structures |
US6268261B1 (en) * | 1998-11-03 | 2001-07-31 | International Business Machines Corporation | Microprocessor having air as a dielectric and encapsulated lines and process for manufacture |
AU4277700A (en) * | 1999-05-03 | 2000-11-17 | Dow Corning Corporation | Method for removal of sic |
US6342722B1 (en) * | 1999-08-05 | 2002-01-29 | International Business Machines Corporation | Integrated circuit having air gaps between dielectric and conducting lines |
JP4368498B2 (ja) * | 2000-05-16 | 2009-11-18 | Necエレクトロニクス株式会社 | 半導体装置、半導体ウェーハおよびこれらの製造方法 |
US6387818B1 (en) * | 2000-07-21 | 2002-05-14 | Advanced Micro Devices, Inc. | Method of porous dielectric formation with anodic template |
US6413852B1 (en) * | 2000-08-31 | 2002-07-02 | International Business Machines Corporation | Method of forming multilevel interconnect structure containing air gaps including utilizing both sacrificial and placeholder material |
TW465039B (en) * | 2000-11-06 | 2001-11-21 | United Microelectronics Corp | Void-type metal interconnect and method for making the same |
KR100493409B1 (ko) * | 2000-12-23 | 2005-06-07 | 주식회사 하이닉스반도체 | 반도체 소자 제조방법 |
JP2002324837A (ja) * | 2001-04-25 | 2002-11-08 | Hitachi Ltd | 半導体装置の製造方法 |
JP4661004B2 (ja) * | 2001-08-17 | 2011-03-30 | パナソニック株式会社 | 半導体装置の製造方法 |
JP2003077920A (ja) * | 2001-09-04 | 2003-03-14 | Nec Corp | 金属配線の形成方法 |
JP3526289B2 (ja) * | 2001-10-03 | 2004-05-10 | 株式会社半導体先端テクノロジーズ | 半導体装置の製造方法 |
US6492245B1 (en) * | 2001-10-16 | 2002-12-10 | Taiwan Semiconductor Manufacturing Company | Method of forming air gap isolation between a bit line contact structure and a capacitor under bit line structure |
JP2003163266A (ja) * | 2001-11-28 | 2003-06-06 | Sony Corp | 半導体装置の製造方法および半導体装置 |
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JP4864307B2 (ja) | 2012-02-01 |
ATE505813T1 (de) | 2011-04-15 |
US7319274B2 (en) | 2008-01-15 |
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