TW200731373A - Semiconductor chip and cut-out method therefor - Google Patents

Semiconductor chip and cut-out method therefor

Info

Publication number
TW200731373A
TW200731373A TW095136785A TW95136785A TW200731373A TW 200731373 A TW200731373 A TW 200731373A TW 095136785 A TW095136785 A TW 095136785A TW 95136785 A TW95136785 A TW 95136785A TW 200731373 A TW200731373 A TW 200731373A
Authority
TW
Taiwan
Prior art keywords
semiconductor chip
cut
out method
method therefor
structure material
Prior art date
Application number
TW095136785A
Other languages
Chinese (zh)
Inventor
Tomofumi Kiyomoto
Katsuyuki Ono
Muneo Harada
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of TW200731373A publication Critical patent/TW200731373A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00865—Multistep processes for the separation of wafers into individual elements
    • B81C1/00888—Multistep processes involving only mechanical separation, e.g. grooving followed by cleaving
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Micromachines (AREA)

Abstract

The invention relates to a semiconductor chip and a cut-out method thereof. A structure material 6 is formed on a silicon substrate 4, a holding film 8 is formed on the side of the structure material 6 of the silicon substrate 4. A through-hole 5 extending from one side of the silicon substrate 4 to the structure material 6 of the other side thereof, and a scribe area 3 surrounding the periphery of the structure material 6 are concurrently etched to cut out a semiconductor chip 2.
TW095136785A 2005-10-03 2006-10-03 Semiconductor chip and cut-out method therefor TW200731373A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005290229A JP2007103595A (en) 2005-10-03 2005-10-03 Semiconductor chip and cut-out method therefor

Publications (1)

Publication Number Publication Date
TW200731373A true TW200731373A (en) 2007-08-16

Family

ID=37906231

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095136785A TW200731373A (en) 2005-10-03 2006-10-03 Semiconductor chip and cut-out method therefor

Country Status (3)

Country Link
JP (1) JP2007103595A (en)
TW (1) TW200731373A (en)
WO (1) WO2007040190A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI815900B (en) * 2018-06-06 2023-09-21 日商迪思科股份有限公司 Wafer processing methods

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5176387B2 (en) * 2007-05-18 2013-04-03 大日本印刷株式会社 Membrane structure manufacturing method
JP2009113165A (en) * 2007-11-07 2009-05-28 Tokyo Electron Ltd Method of manufacturing microstructure device
US9165833B2 (en) * 2010-01-18 2015-10-20 Semiconductor Components Industries, Llc Method of forming a semiconductor die

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04159712A (en) * 1990-10-23 1992-06-02 Mitsubishi Electric Corp Manufacture of semiconductor device
JPH04297056A (en) * 1991-03-08 1992-10-21 Sony Corp Manufacture of semiconductor device
JPH06112236A (en) * 1992-09-25 1994-04-22 Mitsubishi Electric Corp Semiconductor device and its manufacture
JPH06151588A (en) * 1992-11-09 1994-05-31 Japan Energy Corp Manufacture of semiconductor device
JPH097975A (en) * 1995-06-22 1997-01-10 Hitachi Ltd Semiconductor device and its manufacture
JPH1154478A (en) * 1997-06-05 1999-02-26 Tokai Rika Co Ltd Anodization method for silicon board and manufacture of surface acceleration sensor
JP2000340527A (en) * 1999-05-28 2000-12-08 Horiba Ltd Method for separating semiconductor elements
JP4437337B2 (en) * 1999-06-08 2010-03-24 住友精密工業株式会社 Manufacturing method of semiconductor device
JP2001076599A (en) * 1999-09-02 2001-03-23 Tokai Rika Co Ltd Method of manufacturing for micro-reed switch, micro- reed switch body, and micro-reed switch member
JP2002033765A (en) * 2000-07-17 2002-01-31 Matsushita Electric Ind Co Ltd Device and method for controlling linked list system buffer memory
JP2002093752A (en) * 2000-09-14 2002-03-29 Tokyo Electron Ltd Method and device of isolating semiconductor elements
US20050095814A1 (en) * 2003-11-05 2005-05-05 Xu Zhu Ultrathin form factor MEMS microphones and microspeakers

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI815900B (en) * 2018-06-06 2023-09-21 日商迪思科股份有限公司 Wafer processing methods

Also Published As

Publication number Publication date
WO2007040190A1 (en) 2007-04-12
JP2007103595A (en) 2007-04-19

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