JPH097975A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE: To obtain a semiconductor chip formed into an arbitrary planar shape by forming a resist material on a device formation surface of a semiconductor wafer in an arbitrary pattern, and etching the semiconductor wafer until it is cut down over the entire thickness following a desired pattern. CONSTITUTION: A plurality of desired devices are first formed on a wafer 13 into a circular shape for example. A resist 14 is applied on a device formation surface 13A and is dipped in an etching solution for etching. A circular shape pattern resist 14 is formed on the resulting device formation surface 13A of the wafer 13, and an etching resistant tape 15 is bonded to a surface 13B opposite to the device formation surface 13A. Then, the wafer 13 is dipped in a wet etching solution for etching, and a separation groove 16 is formed such that the wafer 13 is cut down over the entire thickness following the circular pattern of the resist 14, and hence the wafer 13 is divided into a plurality of semiconductor chips 1. In succession, the etching resistant tape 15 is mechanically exfoliated, and the resist 14 is removed with a solvent.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a technique effectively applied to a semiconductor device in which a planar shape of a semiconductor chip is arbitrarily formed.

[0002]

2. Description of the Related Art In order to manufacture a semiconductor device represented by an LSI, a semiconductor wafer sliced from an ingot in advance is used, and the semiconductor wafer is subjected to a series of process treatments to form a plurality of desired elements. Is done. Then, by dicing this semiconductor wafer linearly in the vertical and horizontal directions by a dicing machine along a dicing (scribing) region between the elements,
A semiconductor wafer is divided into a plurality of semiconductor chips each having a square shape such as a square shape or a rectangular shape.

Subsequently, each semiconductor chip is die-bonded onto a support such as a lead frame or a wiring board,
Further, after wire bonding or the like is performed, the semiconductor device is assembled by packaging.

As described above, in manufacturing a semiconductor device, a dicing process for separating a semiconductor wafer into a plurality of semiconductor chips is required. The semiconductor wafer is regularly diced in the vertical and horizontal directions by a diamond blade of a dicing machine to obtain a plurality of semiconductor chips. Separated into semiconductor chips.

Such a semiconductor wafer dicing technique is described in, for example, "LSI Process Engineering", published by Ohm Co., Ltd., August 20, 1991, P238 to P240.

[0006]

In the conventional method for manufacturing a semiconductor device, a plurality of semiconductor chips are separated from a semiconductor wafer by a dicing method using a diamond blade. Since the shape is limited to a specific shape obtained by intersecting straight lines, there are the following problems.

(1) A semiconductor chip having a planar shape other than a rectangular shape such as a rectangular shape or a square shape obtained by intersecting straight lines cannot be obtained.

The plane shape of the semiconductor chip does not necessarily have to be a square shape, and in some cases, a plane shape without corners such as a circular shape surrounded by curved lines or an elliptical shape may be advantageous. For example, in the case of LSIs incorporated in mobile phones, cameras, etc., which are highly demanded to be miniaturized,
Since a slight saving of mounting space is also a problem, in this case, it is possible to reduce the size of the package by designing the plane shape of the semiconductor chip into a circular shape or an elliptical shape.

(2) The number and size of semiconductor chips that can be formed on one semiconductor wafer are limited.

Since the semiconductor chips are separated by the dicing method, the planar shape of the semiconductor chips is limited to a square shape, and it is impossible to combine arbitrary different shapes and sizes. This is an obstacle when the semiconductor chips are made to have various shapes and sizes and a large number of semiconductor devices are manufactured in small quantities.

(3) Since conductive foreign matter is generated during dicing, a short circuit defect of a semiconductor chip is likely to occur.

Since the electrode material of the semiconductor wafer and the foreign substance made of the semiconductor material are scattered around by the dicing and adhere to the semiconductor chip, the electrodes are short-circuited and a defect is apt to occur, which lowers the manufacturing yield.

(4) Cracks and chips occur in the peripheral portion of the semiconductor chip during dicing.

Therefore, the fold strength of the semiconductor chip is lowered, and the semiconductor chip is easily broken by a small impact when it is handled in the manufacturing process. In addition, the yield at the time of chip selection may decrease due to a large chip that extends to the element region.

An object of the present invention is to provide a technique capable of limiting the planar shape of a plurality of semiconductor chips separated from a semiconductor wafer to a specific shape.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0017]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, typical ones are briefly described as follows.

(1) The semiconductor device of the present invention has a semiconductor chip formed in an arbitrary plane shape.

(2) The method of manufacturing a semiconductor device according to the present invention comprises:
A step of forming a desired element on a semiconductor wafer, a step of forming a resist material on an element forming surface of this semiconductor wafer in an arbitrary pattern, and a step of completely resisting the surface of the semiconductor wafer opposite to the element forming surface. A step of adhering an etching tape, a step of etching the semiconductor wafer until it is cut from the element formation surface according to the desired pattern over the entire thickness, and a semiconductor wafer by removing the resist material and the etching resistant tape. Is separated into a plurality of semiconductor chips having a planar shape according to the desired pattern.

(3) The method of manufacturing a semiconductor device according to the present invention comprises:
A step of forming a desired element on a semiconductor wafer, a step of forming a resist material in an arbitrary pattern on the surface of the semiconductor wafer opposite to the element forming surface, and a step of completely resisting the element forming surface of the semiconductor wafer. A step of adhering an etching tape, a step of etching this semiconductor wafer from the surface opposite to the element forming surface until it is cut over the entire thickness according to the desired pattern, and the resist material and the etching resistant tape. And removing the semiconductor wafer into a plurality of semiconductor chips having a planar shape according to the desired pattern.

[0021]

According to the above-mentioned means (1), since the semiconductor device of the present invention has the semiconductor chips formed in an arbitrary plane shape, the planes of the plurality of semiconductor chips separated from the semiconductor wafer. The shape is no longer restricted to a particular shape.

According to the above-mentioned means (2), the method of manufacturing a semiconductor device of the present invention is a process of forming a desired element on a semiconductor wafer and a resist material having an arbitrary pattern on the element forming surface of the semiconductor wafer. And a step of adhering an etching resistant tape to the entire surface of the semiconductor wafer opposite to the element formation surface, and the semiconductor wafer is formed over the entire thickness from the element formation surface according to the desired pattern. A step of etching until it is cut,
A step of removing the resist material and the etching resistant tape to separate the semiconductor wafer into a plurality of semiconductor chips having a planar shape according to the desired pattern. The planar shape of the chip is no longer limited to a specific shape.

According to the above-mentioned means (3), the method of manufacturing a semiconductor device of the present invention comprises a step of forming a desired element on the semiconductor wafer and an optional step on the surface of the semiconductor wafer opposite to the element forming surface. The step of forming a resist material in the pattern, the step of adhering an etching resistant tape to the element forming surface of the semiconductor wafer, and the semiconductor wafer from the surface opposite to the element forming surface. A step of etching until it is cut along the entire thickness according to a pattern, and a step of removing the resist material and the etching resistant tape to separate a semiconductor wafer into a plurality of semiconductor chips having a planar shape according to the desired pattern. Therefore, the planar shape of the plurality of semiconductor chips separated from the semiconductor wafer is not limited to a specific shape.

Hereinafter, the present invention will be described in detail with reference to the drawings together with embodiments.

In all the drawings for explaining the embodiments, those having the same function are designated by the same reference numerals, and the repeated description thereof will be omitted.

[0026]

【Example】

(Embodiment 1) FIG. 1 shows a semiconductor device according to Embodiment 1 of the present invention. (A) is a plan view, (b) is A- of (a).
It is A sectional drawing. The semiconductor device of this embodiment has a thickness of about 10
There is a semiconductor chip 1 of 0 μm, which is made of, for example, a silicon single crystal and has a circular planar shape, and the semiconductor chip 1 is die-bonded onto a die pad 17. A wire 20 is bonded between the pad electrode 18 of the semiconductor chip 1 and the lead 19 arranged around the circular semiconductor chip 1, and the semiconductor chip 1, the bonding wire 20 and the tip of the lead 19 on the die pad 17 are It is sealed by a circular resin package 21. Note that the number of the pad electrodes 18 and the leads 19 is shown as a limited example for the sake of simplicity. (A)
In the above description, a structure in which a part of the package 21 is removed is described.

2A and 2B show a semiconductor chip 1 used in a semiconductor device according to Embodiment 1 of the present invention. FIG. 2A is a plan view, FIG. 2B is a sectional view taken along line AA of FIG. Is (b)
It is sectional drawing which expands and shows the principal part M of. The semiconductor chip 1 is formed in a circular shape in plan view, and the side surface 2 is formed in a tapered shape by an etching process as described later.

In the main part of the semiconductor chip 1, as a desired element 3, an element such as a transistor or a plurality of elements arranged so as to form a specific logic are formed. As an example of forming a transistor as the element 3, 4 is a P type substrate layer, 5 is an N type collector region, 6 is a P type base region, 7 is an N + type emitter region,
Reference numeral 8 is a collector electrode, 9 is a base electrode, 10 is an emitter electrode, and 11 is a surface protective film. Pad electrodes 18 are formed on the surface of the semiconductor chip 1.

Next, with reference to FIGS. 3 to 8, one method of manufacturing the semiconductor device of this embodiment will be described in the order of steps.

First, as shown in FIG. 3, a wafer 13 made of, for example, a silicon single crystal and having a thickness of about 500 μm is prepared, and the wafer 13 is subjected to a series of well-known process processes to obtain a plurality of desired elements 3. Form. As the element 3, for example, a transistor as shown in FIG. 2C is formed. The region in which the element 3 is formed will be a region which will be separated as the semiconductor chip 1 in a later step. As shown in FIG. 4, the plane shape of the semiconductor chip 1 corresponding to the region is circular. ing. This planar shape can be easily formed by using a photolithography technique generally used in semiconductor manufacturing.

Next, a so-called probe test for inspecting the electrical characteristics of each element 3 is performed on the wafer 13. Subsequently, the element formation surface 1 of the wafer 13 for which the probe inspection is completed
A resist 14 is formed (applied) on the entire surface of 3A. This resist 14 acts as a mask during the etching process.

Next, as shown in FIG. 5, the wafer 13 is immersed in a wet etching solution for etching, and the surface 13B opposite to the element forming surface 13A where the resist 14 is not formed is etched to a thickness. Process to about 100 μm. As the etching liquid, for example, each liquid shown in Table 1 can be used.

[0033]

[Table 1]

For example, No. If the etching solution of No. 1 is used, it takes about 20 minutes {(500 μm-100 μm)
/ 20 μm} By etching, a predetermined thickness can be obtained.

Next, as shown in FIG. 6, a resist 14 is formed in a circular pattern on the element forming surface 13A of the wafer 13 thus obtained. A well-known photoresist is used as the resist 14, and a circular pattern can be easily formed by applying a photolithography technique. Then, the etching resistant tape 15 is adhered to the entire surface 13B of the wafer 13 opposite to the element forming surface 13A.

Next, as shown in FIG. 7, the wafer 13 is immersed in a wet etching solution to perform an etching process, and a portion of the element forming surface 13A where the resist 14 is not formed is subjected to a circular pattern of the resist 14 in accordance with a circular pattern. The separation groove 16 is formed so that the wafer 13 is cut over the entire thickness. That is, the wafer 13 is etched for 100 μm. As the etching liquid, each liquid as shown in Table 1 can be used. For example, N
o. If the etching solution of No. 1 is used, the wafer 13 can be cut by performing an etching process for about 5 minutes (100 μm / 20 μm). As a result, the wafer 13 is divided into a plurality of semiconductor chips 1.
However, at this point in time, since each semiconductor chip 1 is fixed to the etching resistant tape 15, it is held integrally without being separated into pieces.

Subsequently, as shown in FIG. 8, each semiconductor chip 1 is mechanically peeled from the etching resistant tape 15 and the resist 14 is removed by a solvent,
Since the semiconductor chips 1 are separated from each other, the semiconductor chip 1 as shown in FIG. 2 is obtained. In each of the above steps, the dimensions of the wafer 13 and the separation groove 16 do not reflect actual values.

Next, the semiconductor chip 1 thus obtained is supplied to the assembly process to perform die bonding, wire bonding, packaging, etc. to complete the semiconductor device as shown in FIG.

Next, with reference to FIGS. 9 to 12, another method of manufacturing the semiconductor device of this embodiment will be described in the order of steps.

First, as shown in FIG. 9, a so-called back surface grinding is performed using a wafer 13 of a thickness of about 500 μm, which is made of, for example, a silicon single crystal and on which a plurality of desired elements 3 are formed by performing a well-known series of process treatments. By the (back grinding) process, the thickness is processed to about 200 μm. Next, a resist 14 is formed in a circular pattern on the surface 13B of the wafer 13 opposite to the element forming surface 13A after forming a barrier film (intermediate thin film) 22 such as Cr. The barrier film 22 has a property of protecting the wafer 13 from the etching solution (medium) during the etching process. Subsequently, the etching resistant tape 15 is adhered over the entire surface of the wafer 13 on which the element is formed 13A.

Next, as shown in FIG. 10, the wafer 13 is immersed in a wet etching solution such as cerium nitrate second ammonium to perform an etching process, and the barrier film on the surface 13B where the resist 14 is not formed. 22 is etched.

Then, as shown in FIG.
Is immersed in a wet etching solution to perform an etching process, and a wafer 1 is formed according to a circular pattern of the resist 14 from a portion of the surface 13B where the resist 14 is not formed.
The separation groove 16 is formed so that 3 is cut over the entire thickness of 200 μm. As the etching liquid, each liquid as shown in Table 1 can be used. For example, No.
If the etching solution of 1 is used, it takes about 10 minutes (2
(00 μm / 20 μm)
The wafer 13 can be cut. As a result, the wafer 13 is divided into a plurality of semiconductor chips 1.

During this etching process, the barrier film 22 acts to protect the wafer 13 from the etching solution when the acid resistance of the resist 14 is insufficient, and prevents the side etching of the separation groove 16 from increasing. There is. The barrier film 22 is made of Au, Pt, SiO in addition to the above-mentioned Cr.
₂ , Si ₃ N ₄ or the like can be used.

Then, as shown in FIG.
By peeling 4 and the etching resistant tape 15 with a solvent, the respective semiconductor chips 1 are separated from each other, and thus the semiconductor chip 1 as shown in FIG. 2 is obtained.
In this case, the barrier film 22 may be left as it is, or when it is unnecessary, it is removed by the above-mentioned etching solution.

The semiconductor chip 1 thus obtained is then sent to the assembly process to complete the semiconductor device as shown in FIG.

As shown in FIG. 1, the package 21 is designed to have a circular shape corresponding to the semiconductor chip 1 when the plane shape of the semiconductor chip 1 is selected to be circular, as in this embodiment. Therefore, it is possible to design a package having no corners, as compared with a package which has been designed in a square shape corresponding to a conventional square semiconductor chip. As a result, the package can be downsized, and the semiconductor device such as an LSI can be downsized.

(Embodiment 2) FIG. 13 is a plan view showing a semiconductor chip 1 used in a semiconductor device according to Embodiment 2 of the present invention, and shows an example in which the semiconductor chip 1 has an elliptical planar shape. . FIG. 14 is a plan view showing the wafer 13 used in the manufacturing process of the semiconductor device of this embodiment, and a plurality of semiconductor chips 1 having an elliptical planar shape corresponding to the region where the element 3 is formed are arranged.

The semiconductor device of this embodiment can be manufactured only by changing the pattern of the resist 14 formed in FIG. 6 or 9 into an elliptical shape.

(Embodiment 3) FIG. 15 is a plan view showing a wafer 13 used in a manufacturing process of a semiconductor device according to Embodiment 3 of the present invention, and a circular semiconductor chip 1 in Embodiment 2.
9A and 9B show an elliptical semiconductor chip 1 in Example 3 or a wafer 13 on which modified shapes thereof are formed at the same time.

That is, in the present embodiment, the plane shape of the semiconductor chip 1 corresponding to the region of the element 3 to be formed is
At least two types of a circular shape and an elliptical shape are selected and formed in advance, and the resist 14 formed in FIG. 6 or 9 is formed.
By selecting each of the patterns as a circular shape and an elliptical shape, two types of semiconductor chips 1 having a circular planar shape and an elliptical planar shape can be obtained from one wafer 13.

(Embodiment 4) FIG. 16 is a plan view showing a wafer 13 used in a manufacturing process of a semiconductor device according to Embodiment 4 of the present invention. The circular semiconductor chip 1 in Embodiment 2 is shown in FIG.
9 shows a wafer 13 on which not only the elliptical semiconductor chip 1 in Example 3 but also the rectangular and square semiconductor chips 1 are simultaneously formed.

That is, in this embodiment, the plane shape of the semiconductor chip 1 corresponding to the region of the element 3 to be formed is
In addition to the circular and elliptical shapes, four types of rectangular and square shapes are selected and formed in advance, and the pattern of the resist 14 formed in FIG.
By choosing oval, rectangular and square shapes,
It is possible to obtain four types of semiconductor chips 1 having a circular shape, an elliptical shape, a rectangular shape, and a square shape in a plan view from one wafer 13.

As described above, in this embodiment, in addition to the planar shape without the corners surrounded by the curved lines such as the circular shape and the elliptical shape, the rectangular shape and the square shape formed by the conventional dicing method are used. It is also possible to form a rectangular planar shape such as.

According to each embodiment of the present invention as described above, the following effects can be obtained.

(1) Since a semiconductor chip having an arbitrary planar shape other than the rectangular shape formed by the conventional dicing method can be obtained, a planar semiconductor chip suitable for the purpose and application can be obtained. .

For example, by forming the semiconductor chip 1 having a planar shape without a corner such as a circular shape or an elliptical shape, a miniaturized semiconductor device can be manufactured, so that the saving of the mounting space becomes a problem. It can be incorporated into mobile phones, cameras, etc., which are highly demanded to be miniaturized.

Alternatively, as shown in Example 5 in FIG. 17, the planar shape is L-shaped (a), V-shaped (b), U-shaped (c),
It is possible to form an elongated semiconductor chip having a shape of (d), and it is possible to integrate two types of elements which are not preferable to be arranged adjacent to each other using these semiconductor chips. For example, the present invention can be applied to a case where a high-speed element that processes a small signal at a high speed is formed at one end of a slender semiconductor chip and a high-output element that processes a large signal is formed at the other end. By arranging both elements in this way, it becomes possible to mitigate the influence of heat generated in the high-power element on the operation of the high-speed element.

(2) The number and size of semiconductor chips that can be formed on one semiconductor wafer are not limited.

Since the wafer 13 on which the desired element 3 is formed is subjected to the etching process to be divided into a plurality of semiconductor chips 1,
The planar shape and size of the semiconductor chip 1 can be determined according to the pattern of the resist 14 used as a mask during the etching process. Therefore, one wafer 13
Since the number and size of the semiconductor chips formed in the can be arbitrarily changed, and different shapes can be combined, the shape of the semiconductor chip 1 can be made to have various shapes. Can be produced in small quantities.

(3) Since the semiconductor chip 1 is separated from the wafer 13 by the etching process, conductive foreign matter does not occur, so that a short circuit defect of the semiconductor chip 1 does not occur.

(4) Since the semiconductor chip 1 is separated from the wafer 13 by the etching process, the peripheral portion of the semiconductor chip 1 is not cracked or chipped.

As described above, the invention made by the present inventor is
Although the present invention has been specifically described based on the above-mentioned embodiments, the present invention is not limited to the above-mentioned embodiments, and it goes without saying that various modifications can be made without departing from the scope of the invention.

For example, in the above-mentioned embodiment, an example in which the wafer is subjected to the etching treatment using a specific etching solution has been described, but the present invention is not limited to this, and another etching solution may be used.

Further, the thickness of the wafer for separating the semiconductor chips is shown as an example in the above-mentioned embodiment, and can be arbitrarily changed according to the purpose, application and the like.

Further, the use of the barrier film at the time of etching treatment is not limited to the example shown in the embodiment, but may be used in other steps as necessary.

Furthermore, as a method of assembling the semiconductor chip, a so-called face-down bonding method may be used.

In the above description, the case where the invention made by the present inventor is mainly applied to the semiconductor device which is the field of application which is the background of the invention has been described, but the invention is not limited thereto. The present invention can be applied at least under the condition that a semiconductor chip is separated from a semiconductor wafer by an etching process.

[0068]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

When separating a semiconductor chip from a wafer,
Since the semiconductor chip is separated by etching the wafer, it is possible to form a semiconductor chip having an arbitrary planar shape.

[Brief description of drawings]

1A and 1B show a semiconductor device according to a first embodiment of the present invention, in which FIG. 1A is a plan view and FIG. 1B is a sectional view taken along line AA of FIG.

2A and 2B show a semiconductor chip used in a semiconductor device according to a first embodiment of the present invention. FIG. 2A is a plan view, FIG. 2B is a sectional view taken along line AA of FIG. 2A, and FIG. It is sectional drawing which expands and shows the principal part.

FIG. 3 is a cross-sectional view showing a step in the semiconductor device fabrication method of the first embodiment of the present invention.

FIG. 4 is a plan view showing one step of a method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 5 is a sectional view showing another step of the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 6 is a cross-sectional view showing another process of the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 7 is a cross-sectional view showing another process of the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 8 is a cross-sectional view showing another process of the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 9 is a sectional view showing a step of another method of manufacturing a semiconductor device according to the first embodiment of the present invention.

FIG. 10 is a cross-sectional view showing another step of the method of manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 11 is a cross-sectional view showing another process of the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 12 is a cross-sectional view showing another process of the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 13 is a plan view showing a semiconductor chip used in a semiconductor device according to a second embodiment of the invention.

FIG. 14 is a plan view showing a wafer used in a manufacturing process of a semiconductor device according to a second embodiment of the present invention.

FIG. 15 is a plan view showing a wafer used in a manufacturing process of a semiconductor device according to a third embodiment of the present invention.

FIG. 16 is a plan view showing a wafer used in a manufacturing process of a semiconductor device according to a fourth embodiment of the present invention.

FIG. 17 is a plan view showing a semiconductor chip used in a semiconductor device according to a fifth embodiment of the present invention.

[Explanation of symbols]

1 ... Semiconductor chip, 2 ... Side surface of semiconductor chip, 3 ... Element, 4 ... P-type substrate layer, 5 ... N-type collector region, 6 ... P-type base region, 7 ... N + -type emitter region, 8 ... Collector electrode, 9 ... Base electrode, 10 ... Emitter electrode, 11 ... Surface protective film, 13 ... Wafer, 13A ... Element formation surface, 13B ...
Surface opposite to element formation surface, 14 ... Resist, 15 ... Etching resistant tape, 16 ... Separation groove, 17 ... Die pad,
18 ... Pad electrode, 19 ... Lead, 20 ... Bonding wire, 21 ... Package.

Claims (7)

[Claims] 1. A semiconductor device having a semiconductor chip formed in an arbitrary plane shape. 2. The semiconductor device according to claim 2, wherein the arbitrary planar shape is a planar shape other than a rectangular shape. 3. A step of forming a desired element on a semiconductor wafer, a step of forming a resist material with an arbitrary pattern on the element forming surface of the semiconductor wafer, and a surface of the semiconductor wafer opposite to the element forming surface. A step of adhering an etching resistant tape over the entire surface, a step of etching the semiconductor wafer from the element forming surface until it is cut over the entire thickness according to the desired pattern, and the resist material and the etching resistant tape. A step of removing the semiconductor wafer into a plurality of semiconductor chips having a planar shape according to the desired pattern, and manufacturing the semiconductor device. 4. A step of forming a desired element on a semiconductor wafer, a step of forming a resist material in an arbitrary pattern on a surface of the semiconductor wafer opposite to the element forming surface, and the element forming surface of the semiconductor wafer. A step of adhering an etching resistant tape over the entire surface, a step of etching the semiconductor wafer from the surface opposite to the element forming surface until it is cut over the entire thickness according to the desired pattern, the resist material and A step of removing the etching resistant tape and separating the semiconductor wafer into a plurality of semiconductor chips having a planar shape according to the desired pattern. 5. The method of manufacturing a semiconductor device according to claim 3, wherein the resist material is formed on a surface opposite to the element formation surface via an intermediate thin film. 6. The method of manufacturing a semiconductor wafer according to claim 5, wherein the intermediate thin film has a property of protecting the semiconductor wafer from an etching medium during an etching process. 7. The method of manufacturing a semiconductor device according to claim 2, wherein the etching process is a wet etching process.