DE60021691D1 - Integrierte Halbleiterschaltung mit Selbstprüfungsfunktion - Google Patents

Integrierte Halbleiterschaltung mit Selbstprüfungsfunktion

Info

Publication number
DE60021691D1
DE60021691D1 DE60021691T DE60021691T DE60021691D1 DE 60021691 D1 DE60021691 D1 DE 60021691D1 DE 60021691 T DE60021691 T DE 60021691T DE 60021691 T DE60021691 T DE 60021691T DE 60021691 D1 DE60021691 D1 DE 60021691D1
Authority
DE
Germany
Prior art keywords
self
semiconductor circuit
integrated semiconductor
test function
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60021691T
Other languages
English (en)
Other versions
DE60021691T2 (de
Inventor
Atsushi Kawabe
Hideo Miyazawa
Satoshi Hori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE60021691D1 publication Critical patent/DE60021691D1/de
Application granted granted Critical
Publication of DE60021691T2 publication Critical patent/DE60021691T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318522—Test of Sequential circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Microcomputers (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE60021691T 1999-12-07 2000-12-07 Integrierte Halbleiterschaltung mit Selbstprüfungsfunktion Expired - Lifetime DE60021691T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP34774699 1999-12-07
JP34774699A JP3509001B2 (ja) 1999-12-07 1999-12-07 自己診断テスト回路機能を備えた半導体集積回路および半導体集積回路のテスト方法

Publications (2)

Publication Number Publication Date
DE60021691D1 true DE60021691D1 (de) 2005-09-08
DE60021691T2 DE60021691T2 (de) 2005-12-29

Family

ID=18392310

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60021691T Expired - Lifetime DE60021691T2 (de) 1999-12-07 2000-12-07 Integrierte Halbleiterschaltung mit Selbstprüfungsfunktion

Country Status (5)

Country Link
US (1) US6832348B2 (de)
EP (1) EP1113280B1 (de)
JP (1) JP3509001B2 (de)
KR (1) KR100723340B1 (de)
DE (1) DE60021691T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004021833A (ja) * 2002-06-19 2004-01-22 Renesas Technology Corp 自己テスト機能内蔵半導体集積回路およびそれを備えたシステム
US7424659B2 (en) * 2003-10-31 2008-09-09 Sandisk Il Ltd. System-in-package and method of testing thereof
US7730368B2 (en) 2003-10-31 2010-06-01 Sandisk Il Ltd. Method, system and computer-readable code for testing of flash memory
KR100674988B1 (ko) 2005-08-11 2007-01-29 삼성전자주식회사 패키지 번인 테스트가 가능한 반도체 집적 회로 및 번인테스트 방법
JP2009053130A (ja) * 2007-08-29 2009-03-12 Nec Electronics Corp 半導体装置
JP4885163B2 (ja) * 2008-02-29 2012-02-29 ルネサスエレクトロニクス株式会社 半導体装置およびバーンインテスト装置
US9500700B1 (en) * 2013-11-15 2016-11-22 Xilinx, Inc. Circuits for and methods of testing the operation of an input/output port
KR20220155684A (ko) 2021-05-17 2022-11-24 삼성전자주식회사 Crum 칩 및 스마트 카드
CN114488902B (zh) * 2022-02-10 2022-10-25 深圳市海曼科技股份有限公司 一种单片机io口的复用方法、电路及产品

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4493078A (en) * 1982-09-29 1985-01-08 Siemens Corporation Method and apparatus for testing a digital computer
JPS63295980A (ja) * 1987-05-27 1988-12-02 Nec Corp 入出力回路
JPH01121945A (ja) * 1987-11-05 1989-05-15 Nec Corp シングルチップマイクロコンピュータ
JP2673298B2 (ja) 1987-12-17 1997-11-05 三菱電機株式会社 セルフテスト機能付半導体集積回路
US5228139A (en) 1988-04-19 1993-07-13 Hitachi Ltd. Semiconductor integrated circuit device with test mode for testing CPU using external signal
JPH02181677A (ja) 1989-01-06 1990-07-16 Sharp Corp Ｌｓｉのテストモード切替方式
JPH05180903A (ja) 1991-12-28 1993-07-23 Ricoh Co Ltd 半導体集積回路装置のテスト方法及びテスト回路
JPH0764817A (ja) * 1993-08-30 1995-03-10 Mitsubishi Electric Corp 故障検出システム
JP2596355B2 (ja) * 1993-11-18 1997-04-02 日本電気株式会社 マイクロコンピュータ
US5638382A (en) * 1994-06-29 1997-06-10 Intel Corporation Built-in self test function for a processor including intermediate test results
JPH08137824A (ja) * 1994-11-15 1996-05-31 Mitsubishi Semiconductor Software Kk セルフテスト機能内蔵シングルチップマイコン
JPH08305597A (ja) * 1995-05-10 1996-11-22 Nec Corp 電子機器
JP2861973B2 (ja) * 1996-10-11 1999-02-24 日本電気株式会社 半導体集積論理回路のテスト回路
US5961653A (en) * 1997-02-19 1999-10-05 International Business Machines Corporation Processor based BIST for an embedded memory
JPH11203162A (ja) * 1998-01-19 1999-07-30 Mitsubishi Electric Corp 半導体集積回路装置
US6324666B1 (en) * 1998-04-20 2001-11-27 Mitsubishi Denki Kabushiki Kaisha Memory test device and method capable of achieving fast memory test without increasing chip pin number
JP2000057120A (ja) * 1998-08-05 2000-02-25 Nec Corp Ｅｅｐｒｏｍ内蔵ワンチップマイクロコンピュータ
JP3078530B2 (ja) * 1998-10-12 2000-08-21 ローム株式会社 不揮発性半導体メモリｉｃ及びそのバーンインテスト方法

Also Published As

Publication number Publication date
EP1113280A3 (de) 2003-08-06
EP1113280B1 (de) 2005-08-03
US20010003196A1 (en) 2001-06-07
EP1113280A2 (de) 2001-07-04
US6832348B2 (en) 2004-12-14
KR100723340B1 (ko) 2007-05-30
KR20010070275A (ko) 2001-07-25
JP3509001B2 (ja) 2004-03-22
JP2001166003A (ja) 2001-06-22
DE60021691T2 (de) 2005-12-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP