DE4234153A1 - Schaltkreis zur erhoehung der arbeitsgeschwindigkeit einer halbleiter-speichervorrichtung - Google Patents

Schaltkreis zur erhoehung der arbeitsgeschwindigkeit einer halbleiter-speichervorrichtung

Info

Publication number
DE4234153A1
DE4234153A1 DE4234153A DE4234153A DE4234153A1 DE 4234153 A1 DE4234153 A1 DE 4234153A1 DE 4234153 A DE4234153 A DE 4234153A DE 4234153 A DE4234153 A DE 4234153A DE 4234153 A1 DE4234153 A1 DE 4234153A1
Authority
DE
Germany
Prior art keywords
signal
input
control
bit lines
input signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE4234153A
Other languages
German (de)
English (en)
Inventor
Hyong-Gon Lee
Cheol-Ung Jang
Sung-Hee Cho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE4234153A1 publication Critical patent/DE4234153A1/de
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048Data bus control circuits, e.g. precharging, presetting, equalising
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/18Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
DE4234153A 1991-11-19 1992-10-09 Schaltkreis zur erhoehung der arbeitsgeschwindigkeit einer halbleiter-speichervorrichtung Ceased DE4234153A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910020595A KR930010990A (ko) 1991-11-19 1991-11-19 반도체 메모리 장치에서의 스피드 향상을 위한 회로

Publications (1)

Publication Number Publication Date
DE4234153A1 true DE4234153A1 (de) 1993-05-27

Family

ID=19323071

Family Applications (1)

Application Number Title Priority Date Filing Date
DE4234153A Ceased DE4234153A1 (de) 1991-11-19 1992-10-09 Schaltkreis zur erhoehung der arbeitsgeschwindigkeit einer halbleiter-speichervorrichtung

Country Status (8)

Country Link
JP (1) JPH05217378A (enrdf_load_stackoverflow)
KR (1) KR930010990A (enrdf_load_stackoverflow)
CN (1) CN1072528A (enrdf_load_stackoverflow)
DE (1) DE4234153A1 (enrdf_load_stackoverflow)
FR (1) FR2683934A1 (enrdf_load_stackoverflow)
GB (1) GB2261754A (enrdf_load_stackoverflow)
IT (1) IT1258253B (enrdf_load_stackoverflow)
TW (1) TW198157B (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0581465A3 (en) * 1992-07-27 1995-04-12 Samsung Electronics Co Ltd Address transition detection.

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8688955B2 (en) 2010-08-13 2014-04-01 Micron Technology, Inc. Line termination methods and apparatus
CN102723100A (zh) * 2012-05-23 2012-10-10 常州芯奇微电子科技有限公司 多功能内存接口电路

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6224875A (ja) * 1985-07-24 1987-02-02 Sekisui Chem Co Ltd 溶接装置
JPH0640439B2 (ja) * 1986-02-17 1994-05-25 日本電気株式会社 半導体記憶装置
JPH07107797B2 (ja) * 1987-02-10 1995-11-15 三菱電機株式会社 ダイナミツクランダムアクセスメモリ
KR910003605B1 (ko) * 1988-04-30 1991-06-07 삼성전자 주식회사 Sram 센스앰프의 등화회로
JPH0814989B2 (ja) * 1989-05-09 1996-02-14 日本電気株式会社 内部同期型スタティックram
US4969125A (en) * 1989-06-23 1990-11-06 International Business Machines Corporation Asynchronous segmented precharge architecture
EP0419852A3 (en) * 1989-09-22 1992-08-05 Texas Instruments Incorporated A memory with selective address transition detection for cache operation

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0581465A3 (en) * 1992-07-27 1995-04-12 Samsung Electronics Co Ltd Address transition detection.

Also Published As

Publication number Publication date
IT1258253B (it) 1996-02-22
ITMI922575A0 (it) 1992-11-10
CN1072528A (zh) 1993-05-26
GB2261754A (en) 1993-05-26
KR930010990A (ko) 1993-06-23
ITMI922575A1 (it) 1994-05-10
TW198157B (enrdf_load_stackoverflow) 1993-01-11
GB9224303D0 (en) 1993-01-06
JPH05217378A (ja) 1993-08-27
FR2683934A1 (fr) 1993-05-21

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8131 Rejection