DE3889610T2 - Halbleiteranordnung mit einem Trench-Bipolartransistor. - Google Patents

Halbleiteranordnung mit einem Trench-Bipolartransistor.

Info

Publication number
DE3889610T2
DE3889610T2 DE3889610T DE3889610T DE3889610T2 DE 3889610 T2 DE3889610 T2 DE 3889610T2 DE 3889610 T DE3889610 T DE 3889610T DE 3889610 T DE3889610 T DE 3889610T DE 3889610 T2 DE3889610 T2 DE 3889610T2
Authority
DE
Germany
Prior art keywords
bipolar transistor
semiconductor arrangement
trench bipolar
trench
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3889610T
Other languages
English (en)
Other versions
DE3889610D1 (de
Inventor
Susumu C O Nec Corporation Ohi
Masahiko C O Nec Corpo Nakamae
Hiroshi C O Nec Corporat Shiba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3889610D1 publication Critical patent/DE3889610D1/de
Publication of DE3889610T2 publication Critical patent/DE3889610T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66272Silicon vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H01L21/743Making of internal connections, substrate contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41708Emitter or collector electrodes for bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42304Base electrodes for bipolar transistors
DE3889610T 1987-09-29 1988-09-29 Halbleiteranordnung mit einem Trench-Bipolartransistor. Expired - Fee Related DE3889610T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62247175A JPS6489365A (en) 1987-09-29 1987-09-29 Semiconductor device

Publications (2)

Publication Number Publication Date
DE3889610D1 DE3889610D1 (de) 1994-06-23
DE3889610T2 true DE3889610T2 (de) 1994-09-01

Family

ID=17159555

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3889610T Expired - Fee Related DE3889610T2 (de) 1987-09-29 1988-09-29 Halbleiteranordnung mit einem Trench-Bipolartransistor.

Country Status (4)

Country Link
US (1) US4963957A (de)
EP (1) EP0310087B1 (de)
JP (1) JPS6489365A (de)
DE (1) DE3889610T2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8800157A (nl) * 1988-01-25 1989-08-16 Philips Nv Halfgeleiderinrichting en werkwijze ter vervaardiging daarvan.
US5008210A (en) * 1989-02-07 1991-04-16 Hewlett-Packard Company Process of making a bipolar transistor with a trench-isolated emitter
US5109263A (en) * 1989-07-28 1992-04-28 Hitachi, Ltd. Semiconductor device with optimal distance between emitter and trench isolation
JPH04373133A (ja) * 1991-06-24 1992-12-25 Hitachi Ltd 半導体装置
US5194926A (en) * 1991-10-03 1993-03-16 Motorola Inc. Semiconductor device having an inverse-T bipolar transistor
US5311055A (en) * 1991-11-22 1994-05-10 The United States Of America As Represented By The Secretary Of The Navy Trenched bipolar transistor structures
US5345102A (en) * 1992-02-28 1994-09-06 Nec Corporation Bipolar transistor having collector electrode penetrating emitter and base regions
JP2971246B2 (ja) * 1992-04-15 1999-11-02 株式会社東芝 ヘテロバイポーラトランジスタの製造方法
KR960016229B1 (ko) * 1993-09-13 1996-12-07 삼성전자 주식회사 반도체소자의 콘택구조 및 그 제조방법
JPH07106412A (ja) * 1993-10-07 1995-04-21 Toshiba Corp 半導体装置およびその製造方法
US5426059A (en) * 1994-05-26 1995-06-20 Queyssac; Daniel G. Method of making vertically stacked bipolar semiconductor structure
GB2296377A (en) * 1994-12-20 1996-06-26 Korea Electronics Telecomm Pillar bipolar transistors
KR0171000B1 (ko) * 1995-12-15 1999-02-01 양승택 자동 정의된 베이스 전극을 갖는 바이폴라 트랜지스터 구조 및 그 제조방법
US5912501A (en) * 1997-07-18 1999-06-15 Advanced Micro Devices, Inc. Elimination of radius of curvature effects of p-n junction avalanche breakdown using slots
US5969402A (en) * 1997-07-18 1999-10-19 Advanced Micro Devices, Inc. Reduction of depletion spreading sideways utilizing slots
JP3466102B2 (ja) * 1999-03-12 2003-11-10 沖電気工業株式会社 半導体装置及び半導体装置の製造方法
JP2001244416A (ja) * 2000-02-29 2001-09-07 Hitachi Ltd 信号処理用半導体集積回路
FR2807567A1 (fr) * 2000-04-10 2001-10-12 St Microelectronics Sa Procede de realisation d'un transistor bipolaire
JP4955222B2 (ja) 2005-05-20 2012-06-20 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
KR100818892B1 (ko) * 2007-03-19 2008-04-03 동부일렉트로닉스 주식회사 바이폴라 트랜지스터 및 그 제조 방법
US9673084B2 (en) * 2014-12-04 2017-06-06 Globalfoundries Singapore Pte. Ltd. Isolation scheme for high voltage device

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1534896A (en) * 1975-05-19 1978-12-06 Itt Direct metal contact to buried layer
EP0172878B1 (de) * 1984-02-03 1992-07-15 Advanced Micro Devices, Inc. Bipolartransistor mit in schlitzen gebildeten aktiven elementen
JPS60241261A (ja) * 1984-05-16 1985-11-30 Hitachi Ltd 半導体装置およびその製造方法
JPS61127169A (ja) * 1984-11-24 1986-06-14 Sony Corp 半導体装置及びその製造方法
JPH0719838B2 (ja) * 1985-07-19 1995-03-06 松下電器産業株式会社 半導体装置およびその製造方法
US4887144A (en) * 1985-07-26 1989-12-12 Texas Instruments Incorporated Topside substrate contact in a trenched semiconductor structure and method of fabrication
US4764801A (en) * 1985-10-08 1988-08-16 Motorola Inc. Poly-sidewall contact transistors
US4910575A (en) * 1986-06-16 1990-03-20 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit and its manufacturing method

Also Published As

Publication number Publication date
DE3889610D1 (de) 1994-06-23
EP0310087A2 (de) 1989-04-05
JPS6489365A (en) 1989-04-03
US4963957A (en) 1990-10-16
EP0310087B1 (de) 1994-05-18
JPH0548936B2 (de) 1993-07-22
EP0310087A3 (en) 1989-12-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee