DE3885375D1 - Verfahren zur Herstellung einer Maskenbildung und MESFET mit gelagertem Gatter. - Google Patents

Verfahren zur Herstellung einer Maskenbildung und MESFET mit gelagertem Gatter.

Info

Publication number
DE3885375D1
DE3885375D1 DE88112997T DE3885375T DE3885375D1 DE 3885375 D1 DE3885375 D1 DE 3885375D1 DE 88112997 T DE88112997 T DE 88112997T DE 3885375 T DE3885375 T DE 3885375T DE 3885375 D1 DE3885375 D1 DE 3885375D1
Authority
DE
Germany
Prior art keywords
mesfet
mask
production
stored gate
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE88112997T
Other languages
English (en)
Other versions
DE3885375T2 (de
Inventor
Mitsuaki C O Yokohama Fujihira
Masanori C O Yokoha Nishiguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP62199463A external-priority patent/JPS6442817A/ja
Priority claimed from JP62211382A external-priority patent/JPS6455869A/ja
Priority claimed from JP62211383A external-priority patent/JPS6455870A/ja
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Publication of DE3885375D1 publication Critical patent/DE3885375D1/de
Application granted granted Critical
Publication of DE3885375T2 publication Critical patent/DE3885375T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66848—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
    • H01L29/66856—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET with an active layer made of a group 13/15 material
    • H01L29/66863—Lateral single gate transistors
    • H01L29/66871—Processes wherein the final gate is made after the formation of the source and drain regions in the active layer, e.g. dummy-gate processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • H01L21/28587—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds characterised by the sectional shape, e.g. T, inverted T
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/812—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
    • H01L29/8128—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate with recessed gate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/133—Reflow oxides and glasses

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Junction Field-Effect Transistors (AREA)
DE88112997T 1987-08-10 1988-08-10 Verfahren zur Herstellung einer Maskenbildung und MESFET mit gelagertem Gatter. Expired - Fee Related DE3885375T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP62199463A JPS6442817A (en) 1987-08-10 1987-08-10 Formation of mask pattern
JP62211382A JPS6455869A (en) 1987-08-27 1987-08-27 Compound semiconductor device and manufacture thereof
JP62211383A JPS6455870A (en) 1987-08-27 1987-08-27 Compound semiconductor device and manufacture thereof

Publications (2)

Publication Number Publication Date
DE3885375D1 true DE3885375D1 (de) 1993-12-09
DE3885375T2 DE3885375T2 (de) 1994-04-28

Family

ID=27327647

Family Applications (1)

Application Number Title Priority Date Filing Date
DE88112997T Expired - Fee Related DE3885375T2 (de) 1987-08-10 1988-08-10 Verfahren zur Herstellung einer Maskenbildung und MESFET mit gelagertem Gatter.

Country Status (6)

Country Link
US (2) US4981809A (de)
EP (1) EP0303248B1 (de)
KR (1) KR920009718B1 (de)
AU (2) AU606445B2 (de)
CA (1) CA1307054C (de)
DE (1) DE3885375T2 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8801772A (nl) * 1988-07-13 1990-02-01 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij op een oppervlak van een halfgeleiderlichaam geisoleerde geleidersporen worden aangebracht.
CA1300763C (en) * 1988-09-29 1992-05-12 Masanori Nishiguchi Semiconductor device radiation hardened mesfet
DE69031543T2 (de) * 1989-02-17 1998-04-09 Matsushita Electronics Corp Verfahren zum Herstellen einer Halbleitervorrichtung
US5139968A (en) * 1989-03-03 1992-08-18 Mitsubishi Denki Kabushiki Kaisha Method of producing a t-shaped gate electrode
JPH02257640A (ja) * 1989-03-30 1990-10-18 Oki Electric Ind Co Ltd 半導体素子の製造方法
JPH03292744A (ja) * 1990-01-24 1991-12-24 Toshiba Corp 化合物半導体装置およびその製造方法
JPH03248439A (ja) * 1990-02-26 1991-11-06 Rohm Co Ltd 化合物半導体装置の製造方法
JPH04130619A (ja) * 1990-09-20 1992-05-01 Mitsubishi Electric Corp 半導体装置の製造方法
JPH04167439A (ja) * 1990-10-30 1992-06-15 Mitsubishi Electric Corp 半導体装置の製造方法
JPH04260338A (ja) * 1991-02-14 1992-09-16 Mitsubishi Electric Corp 半導体装置の製造方法
AU643780B2 (en) * 1991-04-29 1993-11-25 Sumitomo Electric Industries, Ltd. A semiconductor device
US5106771A (en) * 1991-06-05 1992-04-21 At&T Bell Laboratories GaAs MESFETs with enhanced Schottky barrier
DE69433738T2 (de) * 1993-09-07 2005-03-17 Murata Mfg. Co., Ltd., Nagaokakyo Halbleiterelement und Verfahren zur Herstellung desselben
JP3631506B2 (ja) * 1994-02-18 2005-03-23 三菱電機株式会社 電界効果トランジスタの製造方法
US5448094A (en) * 1994-08-23 1995-09-05 United Microelectronics Corp. Concave channel MOS transistor and method of fabricating the same
JPH08172102A (ja) * 1994-12-20 1996-07-02 Murata Mfg Co Ltd 半導体装置の製造方法
US5618384A (en) * 1995-12-27 1997-04-08 Chartered Semiconductor Manufacturing Pte, Ltd. Method for forming residue free patterned conductor layers upon high step height integrated circuit substrates using reflow of photoresist
US5792708A (en) * 1996-03-06 1998-08-11 Chartered Semiconductor Manufacturing Pte Ltd. Method for forming residue free patterned polysilicon layers upon high step height integrated circuit substrates
JPH10242394A (ja) * 1997-02-27 1998-09-11 Matsushita Electron Corp 半導体装置の製造方法
US5998835A (en) * 1998-02-17 1999-12-07 International Business Machines Corporation High performance MOSFET device with raised source and drain
JP3348702B2 (ja) * 1999-08-26 2002-11-20 ティーディーケイ株式会社 レジストパターンの形成方法及び薄膜素子の製造方法
US7144767B2 (en) * 2003-09-23 2006-12-05 International Business Machines Corporation NFETs using gate induced stress modulation
US8643134B2 (en) * 2011-11-18 2014-02-04 Avogy, Inc. GaN-based Schottky barrier diode with field plate
US8836071B2 (en) 2011-11-18 2014-09-16 Avogy, Inc. Gallium nitride-based schottky barrier diode with aluminum gallium nitride surface layer
US11271367B1 (en) * 2014-12-05 2022-03-08 Ii-Vi Delaware, Inc. Method to form a self-aligned evaporated metal contact in a deep hole and VCSEL with such contact

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3675313A (en) * 1970-10-01 1972-07-11 Westinghouse Electric Corp Process for producing self aligned gate field effect transistor
US4077111A (en) * 1976-07-14 1978-03-07 Westinghouse Electric Corporation Self-aligned gate field effect transistor and method for making same
US4196439A (en) * 1978-07-03 1980-04-01 Bell Telephone Laboratories, Incorporated Semiconductor device drain contact configuration
JPS5923468B2 (ja) * 1978-08-03 1984-06-02 松下電器産業株式会社 半導体装置の製造方法
US4301188A (en) * 1979-10-01 1981-11-17 Bell Telephone Laboratories, Incorporated Process for producing contact to GaAs active region
JPS56111230A (en) * 1980-02-07 1981-09-02 Fujitsu Ltd Preparation of semiconductor device
JPS57126147A (en) * 1981-01-28 1982-08-05 Fujitsu Ltd Manufacture of semiconductor device
US4426656A (en) * 1981-01-29 1984-01-17 Bell Telephone Laboratories, Incorporated GaAs FETs Having long-term stability
DE3270353D1 (en) * 1981-03-16 1986-05-15 Fairchild Camera Instr Co Method of inducing flow or densification of phosphosilicate glass for integrated circuits
US4431900A (en) * 1982-01-15 1984-02-14 Fairchild Camera & Instrument Corporation Laser induced flow Ge-O based materials
JPS59126676A (ja) * 1983-01-07 1984-07-21 Nec Corp 電界効果型トランジスタ
US4519127A (en) * 1983-02-28 1985-05-28 Tokyo Shibaura Denki Kabushiki Kaisha Method of manufacturing a MESFET by controlling implanted peak surface dopants
JPS6038854A (ja) * 1983-08-12 1985-02-28 Hitachi Ltd 半導体装置の製造方法
JPS6084862A (ja) * 1983-10-14 1985-05-14 Seiko Epson Corp 半導体装置の製造方法
JPS6085567A (ja) * 1983-10-17 1985-05-15 Mitsubishi Electric Corp 電界効果トランジスタ
US4618510A (en) * 1984-09-05 1986-10-21 Hewlett Packard Company Pre-passivated sub-micrometer gate electrodes for MESFET devices
JPS6182482A (ja) * 1984-09-29 1986-04-26 Toshiba Corp ＧａＡｓ電界効果トランジスタの製造方法
US4888626A (en) * 1985-03-07 1989-12-19 The United States Of America As Represented By The Secretary Of The Navy Self-aligned gaas fet with low 1/f noise
US4656076A (en) * 1985-04-26 1987-04-07 Triquint Semiconductors, Inc. Self-aligned recessed gate process
US4784967A (en) * 1986-12-19 1988-11-15 American Telephone And Telegraph Company, At&T Bell Laboratories Method for fabricating a field-effect transistor with a self-aligned gate
US4795718A (en) * 1987-05-12 1989-01-03 Harris Corporation Self-aligned contact for MOS processing
US4811077A (en) * 1987-06-18 1989-03-07 International Business Machines Corporation Compound semiconductor surface termination
JPS6465876A (en) * 1987-09-07 1989-03-13 Fujitsu Ltd Manufacture of semiconductor device

Also Published As

Publication number Publication date
EP0303248A2 (de) 1989-02-15
KR920009718B1 (ko) 1992-10-22
AU2060888A (en) 1989-02-16
EP0303248B1 (de) 1993-11-03
US5105242A (en) 1992-04-14
AU606445B2 (en) 1991-02-07
KR890004441A (ko) 1989-04-22
EP0303248A3 (en) 1989-05-03
DE3885375T2 (de) 1994-04-28
AU5878290A (en) 1990-10-25
US4981809A (en) 1991-01-01
CA1307054C (en) 1992-09-01
AU619122B2 (en) 1992-01-16

Similar Documents

Publication Publication Date Title
DE3885375D1 (de) Verfahren zur Herstellung einer Maskenbildung und MESFET mit gelagertem Gatter.
DE69114175D1 (de) Verfahren zur Herstellung von einer Maske und einem Dünnschichttransistor.
DE3789881D1 (de) Verfahren zur Herstellung von Photomasken und Photomaske.
DE68914379D1 (de) Verfahren zur Herstellung von Sinterkörpern.
DE68912044D1 (de) Verfahren zur Herstellung einer Bitumen-Polymer-Zusammensetzung.
DE69010444D1 (de) Anlage zur Herstellung von Schichten.
ATE81339T1 (de) Verfahren zur herstellung von zyklischen sulfaten.
DE3689259D1 (de) Verfahren zur Herstellung von Polyolefinen.
DE3888184D1 (de) Verfahren zur Herstellung von Masken mit Strukturen im Submikrometerbereich.
DE68924619D1 (de) Stereolithographisches Verfahren zur Herstellung von Prothesen.
DE3851461D1 (de) Verfahren zur Herstellung von Schattenmasken.
DE58906292D1 (de) Verfahren zur Herstellung von ultrafeinem Bariumsulfat.
DE68918207D1 (de) Verfahren zur Herstellung von Levodopa.
ATE101144T1 (de) Verfahren zur herstellung von cyclischen sulfaten.
DE58906613D1 (de) Verfahren zur Herstellung von orthodontischen Teilen.
DE69020263D1 (de) Verfahren zur Herstellung von Polyolefinen.
DE68922360D1 (de) Verfahren zur Herstellung von Metall-Polyimid-Verbundwerkstoffen.
DE69208838D1 (de) Verfahren zur Herstellung von Keramikkörpern mit kleinen Durchmessern aufweisenden Löchern
DE69202488D1 (de) Verfahren zur Herstellung von Schneidwerkstoff mit einer verbesserten Zähigkeit.
DE68909287D1 (de) Verfahren zur Herstellung von Acrylonitril.
DE58905820D1 (de) Verfahren zur Herstellung von Eisengranatschichten.
DE3885634D1 (de) Verfahren zur Herstellung eines keramischen Supraleiters.
DE58906122D1 (de) Verfahren zur Herstellung von Phenylethanolen.
DE58907207D1 (de) Verfahren zur Herstellung von metallischen Schichten.
DE58904105D1 (de) Verfahren zur herstellung von hexafluorpropen.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee