DE3788586D1 - Schaltung zur Prüfung des Eingangsspannungssignals für eine halbleiterintegrierte Schaltung. - Google Patents

Schaltung zur Prüfung des Eingangsspannungssignals für eine halbleiterintegrierte Schaltung.

Info

Publication number
DE3788586D1
DE3788586D1 DE87104398T DE3788586T DE3788586D1 DE 3788586 D1 DE3788586 D1 DE 3788586D1 DE 87104398 T DE87104398 T DE 87104398T DE 3788586 T DE3788586 T DE 3788586T DE 3788586 D1 DE3788586 D1 DE 3788586D1
Authority
DE
Germany
Prior art keywords
circuit
testing
input voltage
voltage signal
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE87104398T
Other languages
English (en)
Other versions
DE3788586T2 (de
Inventor
Soichi C O Patent Div Kawasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE3788586D1 publication Critical patent/DE3788586D1/de
Application granted granted Critical
Publication of DE3788586T2 publication Critical patent/DE3788586T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31712—Input or output aspects
    • G01R31/31715—Testing of input or output circuits; test of circuitry between the I/C pins and the functional core, e.g. testing of input or output driver, receiver, buffer
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318572—Input/Output interfaces

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
DE3788586T 1986-03-29 1987-03-25 Schaltung zur Prüfung des Eingangsspannungssignals für eine halbleiterintegrierte Schaltung. Expired - Fee Related DE3788586T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61072166A JPS62228177A (ja) 1986-03-29 1986-03-29 半導体集積回路用許容入力電圧検査回路

Publications (2)

Publication Number Publication Date
DE3788586D1 true DE3788586D1 (de) 1994-02-10
DE3788586T2 DE3788586T2 (de) 1994-05-26

Family

ID=13481383

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3788586T Expired - Fee Related DE3788586T2 (de) 1986-03-29 1987-03-25 Schaltung zur Prüfung des Eingangsspannungssignals für eine halbleiterintegrierte Schaltung.

Country Status (4)

Country Link
US (1) US5687180A (de)
EP (1) EP0239922B1 (de)
JP (1) JPS62228177A (de)
DE (1) DE3788586T2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2515705B2 (ja) * 1986-05-23 1996-07-10 株式会社日立製作所 半導体集積回路装置
US6675333B1 (en) 1990-03-30 2004-01-06 Texas Instruments Incorporated Integrated circuit with serial I/O controller
US6260165B1 (en) 1996-10-18 2001-07-10 Texas Instruments Incorporated Accelerating scan test by re-using response data as stimulus data
JPH10134025A (ja) * 1996-10-30 1998-05-22 Mitsubishi Electric Corp 半導体集積回路
DE102004009268B3 (de) * 2004-02-26 2005-10-20 Siemens Audiologische Technik Ohreinsatz für ein Hörsystem
CN100359333C (zh) * 2004-05-26 2008-01-02 华为技术有限公司 一种应用于芯片的仿真测试方法
KR100799109B1 (ko) * 2006-06-30 2008-01-29 주식회사 하이닉스반도체 반도체 소자
KR100757932B1 (ko) * 2006-07-18 2007-09-11 주식회사 하이닉스반도체 반도체 집적 회로의 테스트 신호 생성 장치 및 방법
KR100845774B1 (ko) * 2006-10-13 2008-07-14 주식회사 하이닉스반도체 반도체 메모리 장치 및 이를 이용한 전압 제어 방법
KR100862994B1 (ko) * 2006-12-07 2008-10-13 주식회사 하이닉스반도체 테스트 모드 구동 회로를 포함한 반도체 메모리 장치 및테스트 모드 구동 방법
KR100885489B1 (ko) * 2007-03-05 2009-02-24 주식회사 하이닉스반도체 반도체장치의 내부전압 생성회로 및 그 내부전압 생성방법.
US7710102B2 (en) * 2007-03-08 2010-05-04 Hynix Semiconductor Inc. Clock test apparatus and method for semiconductor integrated circuit
KR100889312B1 (ko) * 2007-06-08 2009-03-18 주식회사 하이닉스반도체 반도체 소자의 문턱전압 검출부 및 검출방법, 이를 이용한내부전압 생성회로
KR100907929B1 (ko) * 2007-06-26 2009-07-16 주식회사 하이닉스반도체 반도체 칩의 푸르브 테스트장치 및 테스트방법
KR100897274B1 (ko) * 2007-06-28 2009-05-14 주식회사 하이닉스반도체 테스트 제어 회로 및 이를 포함하는 기준 전압 생성 회로
KR100907930B1 (ko) * 2007-07-03 2009-07-16 주식회사 하이닉스반도체 테스트 시간을 줄일 수 있는 반도체 메모리 장치
KR100913960B1 (ko) * 2007-12-14 2009-08-26 주식회사 하이닉스반도체 빌트인 셀프 스트레스 제어 퓨즈장치 및 그 제어방법
KR101069674B1 (ko) * 2009-06-08 2011-10-04 주식회사 하이닉스반도체 반도체 메모리 장치 및 이의 테스트 방법
KR101094903B1 (ko) * 2009-07-30 2011-12-15 주식회사 하이닉스반도체 반도체 집적 회로의 테스트 장치
KR101143442B1 (ko) * 2009-09-30 2012-05-22 에스케이하이닉스 주식회사 반도체 메모리 장치 및 이를 이용한 테스트 방법
KR101124293B1 (ko) * 2009-12-28 2012-03-28 주식회사 하이닉스반도체 테스트 모드 신호 생성장치 및 방법

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3790885A (en) * 1972-03-27 1974-02-05 Ibm Serial test patterns for mosfet testing
US3761695A (en) * 1972-10-16 1973-09-25 Ibm Method of level sensitive testing a functional logic system
US3986041A (en) * 1974-12-20 1976-10-12 International Business Machines Corporation CMOS digital circuits with resistive shunt feedback amplifier
JPS5246671A (en) * 1975-10-08 1977-04-13 Matsushita Electric Ind Co Ltd Rotary brush device
US4357703A (en) * 1980-10-09 1982-11-02 Control Data Corporation Test system for LSI circuits resident on LSI chips
US4503386A (en) * 1982-04-20 1985-03-05 International Business Machines Corporation Chip partitioning aid (CPA)-A structure for test pattern generation for large logic networks
JPS58198771A (ja) * 1982-05-14 1983-11-18 Toshiba Corp 論理回路基板
US4488259A (en) * 1982-10-29 1984-12-11 Ibm Corporation On chip monitor
DE3368770D1 (en) * 1982-11-20 1987-02-05 Int Computers Ltd Testing digital electronic circuits
JPS59175133A (ja) * 1983-03-23 1984-10-03 Nec Corp 論理集積回路
JPS6082871A (ja) * 1983-10-13 1985-05-11 Nec Corp 論理集積回路

Also Published As

Publication number Publication date
EP0239922A2 (de) 1987-10-07
US5687180A (en) 1997-11-11
EP0239922A3 (en) 1989-06-14
DE3788586T2 (de) 1994-05-26
EP0239922B1 (de) 1993-12-29
JPS62228177A (ja) 1987-10-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee