DE3783783D1 - Plastikumhuellter chiptraeger und verfahren zu dessen herstellung. - Google Patents

Plastikumhuellter chiptraeger und verfahren zu dessen herstellung.

Info

Publication number
DE3783783D1
DE3783783D1 DE8787101455T DE3783783T DE3783783D1 DE 3783783 D1 DE3783783 D1 DE 3783783D1 DE 8787101455 T DE8787101455 T DE 8787101455T DE 3783783 T DE3783783 T DE 3783783T DE 3783783 D1 DE3783783 D1 DE 3783783D1
Authority
DE
Germany
Prior art keywords
plastic
production
chip carrier
covered chip
covered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787101455T
Other languages
English (en)
Other versions
DE3783783T2 (de
Inventor
Atsuomi Hirata
Hirokuni Mamiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP61031355A external-priority patent/JPS62189743A/ja
Priority claimed from JP10002086A external-priority patent/JPS62256461A/ja
Priority claimed from JP61100019A external-priority patent/JPS62256460A/ja
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Application granted granted Critical
Publication of DE3783783D1 publication Critical patent/DE3783783D1/de
Publication of DE3783783T2 publication Critical patent/DE3783783T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32153Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/32175Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
    • H01L2224/32188Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic the layer connector connecting to a bonding area protruding from the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15172Fan-out arrangement of the internal vias
    • H01L2924/15173Fan-out arrangement of the internal vias in a single layer of the multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431Details of mounted components
    • H05K2201/10568Integral adaptations of a component or an auxiliary PCB for mounting, e.g. integral spacer element
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10704Pin grid array [PGA]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036Permanent spacer or stand-off in a printed circuit or printed circuit assembly

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
DE8787101455T 1986-02-14 1987-02-03 Plastikumhuellter chiptraeger und verfahren zu dessen herstellung. Expired - Fee Related DE3783783T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP61031355A JPS62189743A (ja) 1986-02-14 1986-02-14 配線回路体
JP10002086A JPS62256461A (ja) 1986-04-30 1986-04-30 ピングリツドアレイ
JP61100019A JPS62256460A (ja) 1986-04-30 1986-04-30 ピングリツドアレイ及びその製造方法

Publications (2)

Publication Number Publication Date
DE3783783D1 true DE3783783D1 (de) 1993-03-11
DE3783783T2 DE3783783T2 (de) 1993-05-19

Family

ID=27287293

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787101455T Expired - Fee Related DE3783783T2 (de) 1986-02-14 1987-02-03 Plastikumhuellter chiptraeger und verfahren zu dessen herstellung.

Country Status (3)

Country Link
US (1) US4890152A (de)
EP (1) EP0232837B1 (de)
DE (1) DE3783783T2 (de)

Families Citing this family (64)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5144412A (en) * 1987-02-19 1992-09-01 Olin Corporation Process for manufacturing plastic pin grid arrays and the product produced thereby
US5184285A (en) * 1987-11-17 1993-02-02 Advanced Interconnections Corporation Socket constructed with molded-in lead frame providing means for installing additional component such as a chip capacitor
US5152057A (en) * 1987-11-17 1992-10-06 Mold-Pac Corporation Molded integrated circuit package
US5168432A (en) * 1987-11-17 1992-12-01 Advanced Interconnections Corporation Adapter for connection of an integrated circuit package to a circuit board
US5108955A (en) * 1988-10-27 1992-04-28 Citizen Watch Co., Ltd. Method of making a resin encapsulated pin grid array with integral heatsink
AU646223B2 (en) * 1989-05-19 1994-02-17 Bt&D Technologies Limited Housing for an opto-electronic device
JP2667510B2 (ja) * 1989-05-20 1997-10-27 株式会社日立製作所 半導体装置およびこれを用いた電子装置
US4970781A (en) * 1989-08-10 1990-11-20 Olin Corporation Process plate for plastic pin grid array manufacturing
GB8918482D0 (en) * 1989-08-14 1989-09-20 Inmos Ltd Packaging semiconductor chips
US5098864A (en) * 1989-11-29 1992-03-24 Olin Corporation Process for manufacturing a metal pin grid array package
US5216283A (en) * 1990-05-03 1993-06-01 Motorola, Inc. Semiconductor device having an insertable heat sink and method for mounting the same
US5399903A (en) * 1990-08-15 1995-03-21 Lsi Logic Corporation Semiconductor device having an universal die size inner lead layout
US5148265A (en) 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
IT1247649B (it) * 1990-10-31 1994-12-28 Sgs Thomson Microelectronics Procedimento di incapsulamento in resina di un dispositivo a semiconduttore di potenza montato su dissipatore allontanando i reofori dal dissipatore mediante l'azione del controstampo in fase di chiusura dello stampo
EP0484180A1 (de) * 1990-11-01 1992-05-06 Fujitsu Limited Verkapselte Halbleiteranordnung mit optimierter Wärmeabführung
US5172214A (en) * 1991-02-06 1992-12-15 Motorola, Inc. Leadless semiconductor device and method for making the same
US5198887A (en) * 1991-03-06 1993-03-30 Motorola, Inc. Semiconductor chip carrier
JP2602380B2 (ja) * 1991-10-23 1997-04-23 富士通株式会社 半導体装置及びその製造方法
US5328870A (en) * 1992-01-17 1994-07-12 Amkor Electronics, Inc. Method for forming plastic molded package with heat sink for integrated circuit devices
US5434750A (en) * 1992-02-07 1995-07-18 Lsi Logic Corporation Partially-molded, PCB chip carrier package for certain non-square die shapes
US5262927A (en) * 1992-02-07 1993-11-16 Lsi Logic Corporation Partially-molded, PCB chip carrier package
US5583377A (en) * 1992-07-15 1996-12-10 Motorola, Inc. Pad array semiconductor device having a heat sink with die receiving cavity
US5285352A (en) * 1992-07-15 1994-02-08 Motorola, Inc. Pad array semiconductor device with thermal conductor and process for making the same
US5438477A (en) * 1993-08-12 1995-08-01 Lsi Logic Corporation Die-attach technique for flip-chip style mounting of semiconductor dies
US5357672A (en) * 1993-08-13 1994-10-25 Lsi Logic Corporation Method and system for fabricating IC packages from laminated boards and heat spreader
US5388327A (en) * 1993-09-15 1995-02-14 Lsi Logic Corporation Fabrication of a dissolvable film carrier containing conductive bump contacts for placement on a semiconductor device package
JPH0786717A (ja) * 1993-09-17 1995-03-31 Fujitsu Ltd プリント配線板構造体
TW258829B (de) * 1994-01-28 1995-10-01 Ibm
US5701034A (en) * 1994-05-03 1997-12-23 Amkor Electronics, Inc. Packaged semiconductor die including heat sink with locking feature
US5458716A (en) * 1994-05-25 1995-10-17 Texas Instruments Incorporated Methods for manufacturing a thermally enhanced molded cavity package having a parallel lid
US5471011A (en) * 1994-05-26 1995-11-28 Ak Technology, Inc. Homogeneous thermoplastic semi-conductor chip carrier package
US5650593A (en) * 1994-05-26 1997-07-22 Amkor Electronics, Inc. Thermally enhanced chip carrier package
US5455387A (en) * 1994-07-18 1995-10-03 Olin Corporation Semiconductor package with chip redistribution interposer
US5567984A (en) * 1994-12-08 1996-10-22 International Business Machines Corporation Process for fabricating an electronic circuit package
US5609889A (en) * 1995-05-26 1997-03-11 Hestia Technologies, Inc. Apparatus for encapsulating electronic packages
US6821821B2 (en) * 1996-04-18 2004-11-23 Tessera, Inc. Methods for manufacturing resistors using a sacrificial layer
JP3374732B2 (ja) * 1997-11-17 2003-02-10 三菱電機株式会社 半導体素子モジュールおよび半導体装置
US6376908B1 (en) * 1997-12-10 2002-04-23 Mitsubishi Gas Chemical Company, Inc. Semiconductor plastic package and process for the production thereof
US6326696B1 (en) 1998-02-04 2001-12-04 International Business Machines Corporation Electronic package with interconnected chips
TW430959B (en) * 1998-04-22 2001-04-21 World Wiser Electronics Inc Thermal enhanced structure of printed circuit board
DE10031204A1 (de) * 2000-06-27 2002-01-17 Infineon Technologies Ag Systemträger für Halbleiterchips und elektronische Bauteile sowie Herstellungsverfahren für einen Systemträger und für elektronische Bauteile
ATE263431T1 (de) * 2000-09-08 2004-04-15 Asm Tech Singapore Pte Ltd Werkzeug und verfahren zum einkapseln elektronischer teile
US6632690B2 (en) * 2001-09-10 2003-10-14 Advanced Micro Devices, Inc. Method of fabricating reliable laminate flip-chip assembly
US6777818B2 (en) * 2001-10-24 2004-08-17 Intel Corporation Mechanical support system for a thin package
US7679096B1 (en) * 2003-08-21 2010-03-16 Opto Technology, Inc. Integrated LED heat sink
US8124459B2 (en) * 2005-04-23 2012-02-28 Stats Chippac Ltd. Bump chip carrier semiconductor package system
JP2007194435A (ja) * 2006-01-19 2007-08-02 Fujitsu Ltd 実装材整列基板、実装装置、実装方法及び回路基板製造方法
JP2007194434A (ja) * 2006-01-19 2007-08-02 Fujitsu Ltd 実装材整列基板、実装装置、実装方法及び回路基板製造方法
JP5355867B2 (ja) * 2007-07-10 2013-11-27 ローム株式会社 集積回路素子
JP5341337B2 (ja) * 2007-10-25 2013-11-13 スパンション エルエルシー 半導体装置及びその製造方法
US7791177B2 (en) * 2007-12-10 2010-09-07 Infineon Technologies Ag Electronic device
BRPI0907481B1 (pt) * 2008-02-05 2019-10-29 Lego As dado de jogar
US8325047B2 (en) 2009-04-08 2012-12-04 Sabic Innovative Plastics Ip B.V. Encapsulated RFID tags and methods of making same
JP2010267954A (ja) * 2009-04-15 2010-11-25 Panasonic Corp 電子機器
JP5599328B2 (ja) * 2011-01-20 2014-10-01 三菱電機株式会社 電力用半導体装置とプリント配線板との接続機構
JP5649142B2 (ja) * 2011-04-05 2015-01-07 パナソニック株式会社 封止型半導体装置及びその製造方法
US8884169B2 (en) 2012-07-02 2014-11-11 Delphi Technologies, Inc. Circuit assembly
TWI471988B (zh) * 2012-11-13 2015-02-01 矽品精密工業股份有限公司 半導體封裝件之製法
JP6166654B2 (ja) * 2013-12-26 2017-07-19 矢崎総業株式会社 電子回路ユニットにおける外装ケースの成形方法
CN105149722B (zh) * 2015-09-02 2017-11-07 成都凯赛尔电子有限公司 芯柱封接用模具及其使用方法
CN108155247B (zh) * 2017-12-22 2019-06-25 珠海市大鹏电子科技有限公司 一种光电耦合器封装电镀工艺
JP6989824B2 (ja) * 2018-03-29 2022-01-12 株式会社アテックス 端子、端子を備えたパワーモジュール用射出成形体、及びその製造方法
JP7453792B2 (ja) * 2020-01-16 2024-03-21 日本航空電子工業株式会社 固定具、固定方法、ケーブル組立体及び構造体
DE102020208862A1 (de) * 2020-07-15 2022-01-20 Zf Friedrichshafen Ag Formwerkzeug zum verkapseln eines pin-fin-artigen leistungsmoduls und verfahren zum herstellen eines leistungsmoduls

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3495023A (en) * 1968-06-14 1970-02-10 Nat Beryllia Corp Flat pack having a beryllia base and an alumina ring
US3585272A (en) * 1969-10-01 1971-06-15 Fairchild Camera Instr Co Semiconductor package of alumina and aluminum
US3684817A (en) * 1971-03-04 1972-08-15 Cogar Corp Electronic module and cap therefor
JPS5315763A (en) * 1976-07-28 1978-02-14 Hitachi Ltd Resin sealed type semiconductor device
US4126882A (en) * 1976-08-02 1978-11-21 Texas Instruments Incorporated Package for multielement electro-optical devices
US4326214A (en) * 1976-11-01 1982-04-20 National Semiconductor Corporation Thermal shock resistant package having an ultraviolet light transmitting window for a semiconductor chip
US4082394A (en) * 1977-01-03 1978-04-04 International Business Machines Corporation Metallized ceramic and printed circuit module
US4338612A (en) * 1979-10-11 1982-07-06 Ricoh Co., Ltd. Multiple deflection plate device for liquid jet printer or the like
US4322778A (en) * 1980-01-25 1982-03-30 International Business Machines Corp. High performance semiconductor package assembly
JPS5796562A (en) * 1980-12-09 1982-06-15 Nec Corp Semiconductor device and manufacture thereof
JPS57145335A (en) * 1981-03-04 1982-09-08 Nec Corp Semiconductor device
JPS582054A (ja) * 1981-06-26 1983-01-07 Fujitsu Ltd 半導体装置
JPS5958851A (ja) * 1982-09-28 1984-04-04 Fujitsu Ltd 半導体装置
JPS59207645A (ja) * 1983-05-11 1984-11-24 Toshiba Corp 半導体装置およびリ−ドフレ−ム
US4513355A (en) * 1983-06-15 1985-04-23 Motorola, Inc. Metallization and bonding means and method for VLSI packages
US4677526A (en) * 1984-03-01 1987-06-30 Augat Inc. Plastic pin grid array chip carrier
JPS6150351A (ja) * 1984-08-20 1986-03-12 Oki Electric Ind Co Ltd Eprom装置
JPS61174752A (ja) * 1985-01-30 1986-08-06 Seiko Epson Corp 半導体装置
US4618739A (en) * 1985-05-20 1986-10-21 General Electric Company Plastic chip carrier package
DE3675321D1 (de) * 1985-08-16 1990-12-06 Dai Ichi Seiko Co Ltd Halbleiteranordnung mit packung vom steckerstifttyp.
JPH0783069B2 (ja) * 1985-12-19 1995-09-06 第一精工株式会社 半導体装置およびその製造方法
US4750092A (en) * 1985-11-20 1988-06-07 Kollmorgen Technologies Corporation Interconnection package suitable for electronic devices and methods for producing same
US4700473A (en) * 1986-01-03 1987-10-20 Motorola Inc. Method of making an ultra high density pad array chip carrier
DE3780764T2 (de) * 1986-11-15 1992-12-24 Matsushita Electric Works Ltd Gegossenes kunststoff-chip-gehaeuse mit steckermuster.
US5147854A (en) * 1990-05-22 1992-09-15 Hoffmann-La Roche Inc. Tgf-b compositions and method
JPH05258370A (ja) * 1992-03-12 1993-10-08 Ricoh Co Ltd 光磁気記録媒体
JPH06240754A (ja) * 1993-02-12 1994-08-30 Fujita Corp 柱・梁接合部構造
JPH06240749A (ja) * 1993-02-22 1994-08-30 Kajima Corp 角型鋼管柱或いは角型鋼管コンクリート柱と梁の仕口構造

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EP0232837A2 (de) 1987-08-19
EP0232837A3 (en) 1989-02-22
DE3783783T2 (de) 1993-05-19
EP0232837B1 (de) 1993-01-27
US4890152A (en) 1989-12-26

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