DE3673777D1 - Ein monolithisch integrierter schaltkreis, insbesondere vom mos oder cmos-typ und verfahren zu seiner herstellung. - Google Patents

Ein monolithisch integrierter schaltkreis, insbesondere vom mos oder cmos-typ und verfahren zu seiner herstellung.

Info

Publication number
DE3673777D1
DE3673777D1 DE8686830293T DE3673777T DE3673777D1 DE 3673777 D1 DE3673777 D1 DE 3673777D1 DE 8686830293 T DE8686830293 T DE 8686830293T DE 3673777 T DE3673777 T DE 3673777T DE 3673777 D1 DE3673777 D1 DE 3673777D1
Authority
DE
Germany
Prior art keywords
mos
production
integrated circuit
monolithically integrated
cmos type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686830293T
Other languages
English (en)
Inventor
Franco Maggioni
Livio Baldi
Paolo Giuseppe Cappelletti
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
SGS Thomson Microelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SRL filed Critical SGS Thomson Microelectronics SRL
Application granted granted Critical
Publication of DE3673777D1 publication Critical patent/DE3673777D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76889—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53271—Conductive materials containing semiconductor material, e.g. polysilicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/019—Contacts of silicides
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/136—Resistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE8686830293T 1985-12-20 1986-10-09 Ein monolithisch integrierter schaltkreis, insbesondere vom mos oder cmos-typ und verfahren zu seiner herstellung. Expired - Fee Related DE3673777D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT23323/85A IT1186485B (it) 1985-12-20 1985-12-20 Circuito integrato monolitico,in particolare di tipo mos o cmos e processo per la realizzazione di tale circuito

Publications (1)

Publication Number Publication Date
DE3673777D1 true DE3673777D1 (de) 1990-10-04

Family

ID=11206066

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686830293T Expired - Fee Related DE3673777D1 (de) 1985-12-20 1986-10-09 Ein monolithisch integrierter schaltkreis, insbesondere vom mos oder cmos-typ und verfahren zu seiner herstellung.

Country Status (5)

Country Link
US (1) US4968645A (de)
EP (1) EP0226549B1 (de)
JP (1) JPH07120653B2 (de)
DE (1) DE3673777D1 (de)
IT (1) IT1186485B (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1989003589A1 (en) * 1987-10-08 1989-04-20 Ncr Corporation Integrated circuit contact fabrication process
US5304502A (en) * 1988-11-08 1994-04-19 Yamaha Corporation Process of fabricating semiconductor integrated circuit having conductive strips used as resistor and gate electrode of component transistor
US5126279A (en) * 1988-12-19 1992-06-30 Micron Technology, Inc. Single polysilicon cross-coupled resistor, six-transistor SRAM cell design technique
US5135882A (en) * 1989-07-31 1992-08-04 Micron Technology, Inc. Technique for forming high-value inter-nodal coupling resistance for rad-hard applications in a double-poly, salicide process using local interconnect
US4975386A (en) * 1989-12-22 1990-12-04 Micro Power Systems, Inc. Process enhancement using molybdenum plugs in fabricating integrated circuits
US5151387A (en) 1990-04-30 1992-09-29 Sgs-Thomson Microelectronics, Inc. Polycrystalline silicon contact structure
US5068201A (en) * 1990-05-31 1991-11-26 Sgs-Thomson Microelectronics, Inc. Method for forming a high valued resistive load element and low resistance interconnect for integrated circuits
JPH04355912A (ja) * 1990-08-09 1992-12-09 Seiko Epson Corp 半導体装置及びその製造方法
US5462894A (en) * 1991-08-06 1995-10-31 Sgs-Thomson Microelectronics, Inc. Method for fabricating a polycrystalline silicon resistive load element in an integrated circuit
US5182627A (en) * 1991-09-30 1993-01-26 Sgs-Thomson Microelectronics, Inc. Interconnect and resistor for integrated circuits
US5475266A (en) * 1992-02-24 1995-12-12 Texas Instruments Incorporated Structure for microelectronic device incorporating low resistivity straps between conductive regions
US5266156A (en) * 1992-06-25 1993-11-30 Digital Equipment Corporation Methods of forming a local interconnect and a high resistor polysilicon load by reacting cobalt with polysilicon
JP3396286B2 (ja) * 1994-02-28 2003-04-14 三菱電機株式会社 半導体集積回路装置およびその製造方法
US6740573B2 (en) 1995-02-17 2004-05-25 Micron Technology, Inc. Method for forming an integrated circuit interconnect using a dual poly process
US5510296A (en) * 1995-04-27 1996-04-23 Vanguard International Semiconductor Corporation Manufacturable process for tungsten polycide contacts using amorphous silicon
US5867087A (en) * 1995-08-24 1999-02-02 Taiwan Semiconductor Manufacturing Company, Ltd. Three dimensional polysilicon resistor for integrated circuits
US6008082A (en) * 1995-09-14 1999-12-28 Micron Technology, Inc. Method of making a resistor, method of making a diode, and SRAM circuitry and other integrated circuitry
US5567644A (en) * 1995-09-14 1996-10-22 Micron Technology, Inc. Method of making a resistor
US5652174A (en) * 1996-05-20 1997-07-29 Taiwan Semiconductor Manufacturing Company Ltd. Unified stacked contact process for static random access memory (SRAM) having polysilicon load resistors
US5883417A (en) * 1996-06-27 1999-03-16 Winbond Electronics Corporation Poly-load resistor for SRAM cell
US6165861A (en) 1998-09-14 2000-12-26 Taiwan Semiconductor Manufacturing Company Integrated circuit polysilicon resistor having a silicide extension to achieve 100% metal shielding from hydrogen intrusion
US20160276156A1 (en) * 2015-03-16 2016-09-22 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and manufacturing process thereof

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3777364A (en) * 1972-07-31 1973-12-11 Fairchild Camera Instr Co Methods for forming metal/metal silicide semiconductor device interconnect system
US4329706A (en) * 1979-03-01 1982-05-11 International Business Machines Corporation Doped polysilicon silicide semiconductor integrated circuit interconnections
JPS5648165A (en) * 1979-09-28 1981-05-01 Hitachi Ltd Preparation of semiconductor device
US4445134A (en) * 1980-12-08 1984-04-24 Ibm Corporation Conductivity WSi2 films by Pt preanneal layering
US4398335A (en) * 1980-12-09 1983-08-16 Fairchild Camera & Instrument Corporation Multilayer metal silicide interconnections for integrated circuits
US4446613A (en) * 1981-10-19 1984-05-08 Intel Corporation Integrated circuit resistor and method of fabrication
US4443930A (en) * 1982-11-30 1984-04-24 Ncr Corporation Manufacturing method of silicide gates and interconnects for integrated circuits
US4569122A (en) * 1983-03-09 1986-02-11 Advanced Micro Devices, Inc. Method of forming a low resistance quasi-buried contact
JPS59210658A (ja) * 1983-05-16 1984-11-29 Nec Corp 半導体装置の製造方法
US4519126A (en) * 1983-12-12 1985-05-28 Rca Corporation Method of fabricating high speed CMOS devices
JPS60130844A (ja) * 1983-12-20 1985-07-12 Toshiba Corp 半導体装置の製造方法
US4581815A (en) * 1984-03-01 1986-04-15 Advanced Micro Devices, Inc. Integrated circuit structure having intermediate metal silicide layer and method of making same
US4621276A (en) * 1984-05-24 1986-11-04 Texas Instruments Incorporated Buried contacts for N and P channel devices in an SOI-CMOS process using a single N+polycrystalline silicon layer
US4604789A (en) * 1985-01-31 1986-08-12 Inmos Corporation Process for fabricating polysilicon resistor in polycide line
JPS6240761A (ja) * 1985-08-15 1987-02-21 Toshiba Corp 読み出し専用半導体記憶装置およびその製造方法

Also Published As

Publication number Publication date
EP0226549B1 (de) 1990-08-29
US4968645A (en) 1990-11-06
JPH07120653B2 (ja) 1995-12-20
IT1186485B (it) 1987-11-26
EP0226549A1 (de) 1987-06-24
IT8523323A0 (it) 1985-12-20
JPS62154778A (ja) 1987-07-09

Similar Documents

Publication Publication Date Title
DE3673777D1 (de) Ein monolithisch integrierter schaltkreis, insbesondere vom mos oder cmos-typ und verfahren zu seiner herstellung.
DE3685124D1 (de) Integriertes halbleiterschaltungsbauelement und verfahren zu seiner herstellung.
DE3681934D1 (de) Integrierter mos-transistor und verfahren zu seiner herstellung.
DE3682021D1 (de) Polysilizium-mos-transistor und verfahren zu seiner herstellung.
DE3581797D1 (de) Misfet mit niedrigdotiertem drain und verfahren zu seiner herstellung.
DE58901772D1 (de) Bauteil, insbesondere einbau-spuele sowie verfahren zu seiner herstellung.
DE3774651D1 (de) Zusammengesetzter formkoerper und verfahren zu seiner herstellung.
DE3686976D1 (de) Bipolares halbleiterbauelement und verfahren zu seiner herstellung.
DE3650323D1 (de) VLSI-Chip und Verfahren zur Herstellung.
DE3580206D1 (de) Bipolarer transistor und verfahren zu seiner herstellung.
DE3579367D1 (de) Halbleiterphotodetektor und verfahren zu seiner herstellung.
DE3587780T2 (de) Elektronisches Bauelement und Verfahren zur Herstellung.
DE3683602D1 (de) Haustierfutter und haustierfutterbestandteil und verfahren zu seiner herstellung.
DE3581417D1 (de) Lateraler bipolarer transistor und verfahren zu seiner herstellung.
DE3685969T2 (de) Integrierte schaltung mit halbleiterkondensator und verfahren zu ihrer herstellung.
DE69022016D1 (de) Fluoriniertes copolymer und verfahren zu seiner herstellung.
DE3781280T2 (de) Thermoplastische elastomerzusammensetzungen und verfahren zu deren herstellung.
DE69022346T2 (de) MOS-Feldeffekttransistor und Verfahren zur Herstellung.
DE3578270D1 (de) Feldeffekt-transistor-anordnung und verfahren zu deren herstellung.
DE3482638D1 (de) Mos-leistungsfeldeffekttransistor und verfahren zu seiner herstellung.
DE3785547D1 (de) Thermoplastische elastomerzusammensetzung und verfahren zu deren herstellung.
DE3582036D1 (de) Integrierbarer mikrowellenbipolartransistor und verfahren zu dessen herstellung.
DE69114697T2 (de) Zeolith vom mfi-typ sowie verfahren zu seiner herstellung.
DE3688711D1 (de) Integrierte halbleiterschaltungsanordnung und verfahren zu ihrer herstellung.
DE3850632D1 (de) Supraleiterelement und Verfahren zu seiner Herstellung.

Legal Events

Date Code Title Description
8328 Change in the person/name/address of the agent

Free format text: WILHELM, H., DR.-ING. DAUSTER, H., DIPL.-ING., PAT.-ANWAELTE, 7000 STUTTGART

8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: PATENTANWAELTE RUFF, WILHELM, BEIER, DAUSTER & PARTNER, 70173 STUTTGART

8339 Ceased/non-payment of the annual fee