DE3012119C2 - Verfahren zum Herstellen eines Halbleiterbauelements - Google Patents

Verfahren zum Herstellen eines Halbleiterbauelements

Info

Publication number
DE3012119C2
DE3012119C2 DE3012119A DE3012119A DE3012119C2 DE 3012119 C2 DE3012119 C2 DE 3012119C2 DE 3012119 A DE3012119 A DE 3012119A DE 3012119 A DE3012119 A DE 3012119A DE 3012119 C2 DE3012119 C2 DE 3012119C2
Authority
DE
Germany
Prior art keywords
semiconductor substrate
mask
semiconductor
region
silicon oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE3012119A
Other languages
German (de)
English (en)
Other versions
DE3012119A1 (de
Inventor
Susumu Hitachi Murakami
Saburo Oikawa
Yoshio Katsuta Terasawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE3012119A1 publication Critical patent/DE3012119A1/de
Application granted granted Critical
Publication of DE3012119C2 publication Critical patent/DE3012119C2/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/211—Gated diodes
    • H10D12/212—Gated diodes having PN junction gates, e.g. field controlled diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D18/00—Thyristors
    • H10D18/60—Gate-turn-off devices 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/343—Gate regions of field-effect devices having PN junction gates
    • H10P14/271—
    • H10P14/2905—
    • H10P14/3411—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/026—Deposition thru hole in mask
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/088—J-Fet, i.e. junction field effect transistor

Landscapes

  • Thyristors (AREA)
  • Junction Field-Effect Transistors (AREA)
DE3012119A 1979-03-30 1980-03-28 Verfahren zum Herstellen eines Halbleiterbauelements Expired DE3012119C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3703479A JPS55130176A (en) 1979-03-30 1979-03-30 Field effect semiconductor element and method of fabricating the same

Publications (2)

Publication Number Publication Date
DE3012119A1 DE3012119A1 (de) 1980-10-02
DE3012119C2 true DE3012119C2 (de) 1985-11-07

Family

ID=12486334

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3012119A Expired DE3012119C2 (de) 1979-03-30 1980-03-28 Verfahren zum Herstellen eines Halbleiterbauelements

Country Status (4)

Country Link
US (1) US4329772A (enExample)
JP (1) JPS55130176A (enExample)
DE (1) DE3012119C2 (enExample)
FR (1) FR2452784A1 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2480502A1 (fr) * 1980-04-14 1981-10-16 Thomson Csf Dispositif semi-conducteur a grille profonde, son application a une diode blocable, et procede de fabrication
US4637127A (en) * 1981-07-07 1987-01-20 Nippon Electric Co., Ltd. Method for manufacturing a semiconductor device
US4375124A (en) * 1981-11-12 1983-03-01 Gte Laboratories Incorporated Power static induction transistor fabrication
US4403396A (en) * 1981-12-24 1983-09-13 Gte Laboratories Incorporated Semiconductor device design and process
US4503451A (en) * 1982-07-30 1985-03-05 Motorola, Inc. Low resistance buried power bus for integrated circuits
US4615746A (en) * 1983-09-29 1986-10-07 Kenji Kawakita Method of forming isolated island regions in a semiconductor substrate by selective etching and oxidation and devices formed therefrom
US4651410A (en) * 1984-12-18 1987-03-24 Semiconductor Division Thomson-Csf Components Corporation Method of fabricating regions of a bipolar microwave integratable transistor
US4835586A (en) * 1987-09-21 1989-05-30 Siliconix Incorporated Dual-gate high density fet
FR2658952A1 (fr) * 1990-02-27 1991-08-30 Thomson Csf Procede de realisation de memoires haute densite.
DK170189B1 (da) * 1990-05-30 1995-06-06 Yakov Safir Fremgangsmåde til fremstilling af halvlederkomponenter, samt solcelle fremstillet deraf
EP1372196A1 (de) * 2002-06-10 2003-12-17 ABB Schweiz AG Verfahren zum Ansteuern einer Leistungsdiode und Schaltungsanordnung zum Durchführen dieses Verfahrens
CN103594490A (zh) * 2012-08-13 2014-02-19 无锡维赛半导体有限公司 晶闸管及晶闸管封装件

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3386865A (en) * 1965-05-10 1968-06-04 Ibm Process of making planar semiconductor devices isolated by encapsulating oxide filled channels
US3404450A (en) * 1966-01-26 1968-10-08 Westinghouse Electric Corp Method of fabricating an integrated circuit structure including unipolar transistor and bipolar transistor portions
US3716422A (en) * 1970-03-30 1973-02-13 Ibm Method of growing an epitaxial layer by controlling autodoping
US3938241A (en) * 1972-10-24 1976-02-17 Motorola, Inc. Vertical channel junction field-effect transistors and method of manufacture
JPS50138777A (enExample) * 1974-04-22 1975-11-05
JPS5150581A (en) * 1974-10-29 1976-05-04 Mitsubishi Electric Corp Tategata 4 kyokusetsugogatadenkaikokatoranjisuta
FR2296263A1 (fr) * 1974-12-24 1976-07-23 Radiotechnique Compelec Procede de fabrication d'un dispositif semi-conducteur a effet de champ a canaux verticaux
JPS51135385A (en) * 1975-03-06 1976-11-24 Texas Instruments Inc Method of producing semiconductor device
JPS51132779A (en) * 1975-05-14 1976-11-18 Hitachi Ltd Production method of vertical-junction type field-effect transistor
JPS5220769A (en) * 1975-08-09 1977-02-16 Nippon Gakki Seizo Kk Longitudinal semi-conductor unit
US3999281A (en) * 1976-01-16 1976-12-28 The United States Of America As Represented By The Secretary Of The Air Force Method for fabricating a gridded Schottky barrier field effect transistor
US4181542A (en) * 1976-10-25 1980-01-01 Nippon Gakki Seizo Kabushiki Kaisha Method of manufacturing junction field effect transistors
JPS5368178A (en) * 1976-11-30 1978-06-17 Handotai Kenkyu Shinkokai Fet transistor

Also Published As

Publication number Publication date
DE3012119A1 (de) 1980-10-02
JPS55130176A (en) 1980-10-08
FR2452784A1 (fr) 1980-10-24
US4329772A (en) 1982-05-18
FR2452784B1 (enExample) 1985-03-08

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Legal Events

Date Code Title Description
OAP Request for examination filed
OD Request for examination
8128 New person/name/address of the agent

Representative=s name: VON FUENER, A., DIPL.-CHEM. DR.RER.NAT. EBBINGHAUS

D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee