FR2452784A1 - Procede de fabrication d'un dispositif semi-conducteur et particulierement d'un thyristor - Google Patents

Procede de fabrication d'un dispositif semi-conducteur et particulierement d'un thyristor

Info

Publication number
FR2452784A1
FR2452784A1 FR8007106A FR8007106A FR2452784A1 FR 2452784 A1 FR2452784 A1 FR 2452784A1 FR 8007106 A FR8007106 A FR 8007106A FR 8007106 A FR8007106 A FR 8007106A FR 2452784 A1 FR2452784 A1 FR 2452784A1
Authority
FR
France
Prior art keywords
conductivity
mask
zone
semiconductor
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR8007106A
Other languages
English (en)
Other versions
FR2452784B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of FR2452784A1 publication Critical patent/FR2452784A1/fr
Application granted granted Critical
Publication of FR2452784B1 publication Critical patent/FR2452784B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7391—Gated diode structures
    • H01L29/7392—Gated diode structures with PN junction gate, e.g. field controlled thyristors (FCTh), static induction thyristors (SITh)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1066—Gate region of field-effect devices with PN junction gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
    • H01L29/744—Gate-turn-off devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/026—Deposition thru hole in mask
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/088—J-Fet, i.e. junction field effect transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Thyristors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PROCEDE DE FABRICATION D'UN DISPOSITIF SEMI-CONDUCTEUR, SELON LEQUEL ON DEPOSE UNE COUCHE EPITAXIALE SUR L'UNE DES FACES PRINCIPALES D'UN SUPPORT SEMI-CONDUCTEUR 1 COMPORTANT UNE COUCHE D'UN CERTAIN TYPE DE CONDUCTIVITE AU VOISINAGE DE LADITE FACE PRINCIPALE, CE PROCEDE ETANT CARACTERISE PAR LE FAIT QU'IL CONSISTE: A RECOUVRIR UNE PARTIE DESDITES FACES PRINCIPALES A L'AIDE D'UN MASQUE, PRESENTANT UNE OUVERTURE; A INTRODUIRE DES ATOMES D'IMPURETES DANS LEDIT SUPPORT SEMI-CONDUCTEUR, POUR LE DOPER, PAR LADITE OUVERTURE PRATIQUEE DANS CE MASQUE, DE MANIERE A REALISER UNE ZONE SEMI-CONDUCTRICE 5 AYANT LA CONDUCTIVITE DU TYPE OPPOSE; A RECOUVRIR LA TOTALITE DE LA SURFACE EXPOSEE DE CETTE ZONE SEMI-CONDUCTRICE AU MOYEN D'UN AUTRE MASQUE, OU CACHE 3B, UNE SURFACE SUPERIEURE A CELLE DE LADITE FACE EXPOSEE DE LADITE ZONE; ET A DEPOSER UNE COUCHE EPITAXIALE 7E AYANT LEDIT PREMIER TYPE DE CONDUCTIVITE, SUR UNE PARTIE EXPOSEE DE LADITE FACE PRINCIPALE.
FR8007106A 1979-03-30 1980-03-28 Procede de fabrication d'un dispositif semi-conducteur et particulierement d'un thyristor Granted FR2452784A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3703479A JPS55130176A (en) 1979-03-30 1979-03-30 Field effect semiconductor element and method of fabricating the same

Publications (2)

Publication Number Publication Date
FR2452784A1 true FR2452784A1 (fr) 1980-10-24
FR2452784B1 FR2452784B1 (fr) 1985-03-08

Family

ID=12486334

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8007106A Granted FR2452784A1 (fr) 1979-03-30 1980-03-28 Procede de fabrication d'un dispositif semi-conducteur et particulierement d'un thyristor

Country Status (4)

Country Link
US (1) US4329772A (fr)
JP (1) JPS55130176A (fr)
DE (1) DE3012119C2 (fr)
FR (1) FR2452784A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0445008A1 (fr) * 1990-02-27 1991-09-04 Thomson-Csf Procédé de réalisation de dispositifs électroniques haute densité

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2480502A1 (fr) * 1980-04-14 1981-10-16 Thomson Csf Dispositif semi-conducteur a grille profonde, son application a une diode blocable, et procede de fabrication
US4637127A (en) * 1981-07-07 1987-01-20 Nippon Electric Co., Ltd. Method for manufacturing a semiconductor device
US4375124A (en) * 1981-11-12 1983-03-01 Gte Laboratories Incorporated Power static induction transistor fabrication
US4403396A (en) * 1981-12-24 1983-09-13 Gte Laboratories Incorporated Semiconductor device design and process
US4503451A (en) * 1982-07-30 1985-03-05 Motorola, Inc. Low resistance buried power bus for integrated circuits
US4615746A (en) * 1983-09-29 1986-10-07 Kenji Kawakita Method of forming isolated island regions in a semiconductor substrate by selective etching and oxidation and devices formed therefrom
US4651410A (en) * 1984-12-18 1987-03-24 Semiconductor Division Thomson-Csf Components Corporation Method of fabricating regions of a bipolar microwave integratable transistor
US4835586A (en) * 1987-09-21 1989-05-30 Siliconix Incorporated Dual-gate high density fet
DK170189B1 (da) * 1990-05-30 1995-06-06 Yakov Safir Fremgangsmåde til fremstilling af halvlederkomponenter, samt solcelle fremstillet deraf
EP1372196A1 (fr) * 2002-06-10 2003-12-17 ABB Schweiz AG Méthode pour commander une diode de puissance et circuit pour mettre en oeuvre cette méthode
CN103594490A (zh) * 2012-08-13 2014-02-19 无锡维赛半导体有限公司 晶闸管及晶闸管封装件

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3716422A (en) * 1970-03-30 1973-02-13 Ibm Method of growing an epitaxial layer by controlling autodoping
FR2296263A1 (fr) * 1974-12-24 1976-07-23 Radiotechnique Compelec Procede de fabrication d'un dispositif semi-conducteur a effet de champ a canaux verticaux
US4036672A (en) * 1975-05-14 1977-07-19 Hitachi, Ltd. Method of making a junction type field effect transistor
US4067036A (en) * 1975-08-09 1978-01-03 Nippon Gakki Seizo Kabushiki Kaisha Junction field effect transistor of vertical type
US4101350A (en) * 1975-03-06 1978-07-18 Texas Instruments Incorporated Self-aligned epitaxial method for the fabrication of semiconductor devices

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3386865A (en) * 1965-05-10 1968-06-04 Ibm Process of making planar semiconductor devices isolated by encapsulating oxide filled channels
US3404450A (en) * 1966-01-26 1968-10-08 Westinghouse Electric Corp Method of fabricating an integrated circuit structure including unipolar transistor and bipolar transistor portions
US3938241A (en) * 1972-10-24 1976-02-17 Motorola, Inc. Vertical channel junction field-effect transistors and method of manufacture
JPS50138777A (fr) * 1974-04-22 1975-11-05
JPS5150581A (en) * 1974-10-29 1976-05-04 Mitsubishi Electric Corp Tategata 4 kyokusetsugogatadenkaikokatoranjisuta
US3999281A (en) * 1976-01-16 1976-12-28 The United States Of America As Represented By The Secretary Of The Air Force Method for fabricating a gridded Schottky barrier field effect transistor
US4181542A (en) * 1976-10-25 1980-01-01 Nippon Gakki Seizo Kabushiki Kaisha Method of manufacturing junction field effect transistors
JPS5368178A (en) * 1976-11-30 1978-06-17 Handotai Kenkyu Shinkokai Fet transistor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3716422A (en) * 1970-03-30 1973-02-13 Ibm Method of growing an epitaxial layer by controlling autodoping
FR2296263A1 (fr) * 1974-12-24 1976-07-23 Radiotechnique Compelec Procede de fabrication d'un dispositif semi-conducteur a effet de champ a canaux verticaux
US4101350A (en) * 1975-03-06 1978-07-18 Texas Instruments Incorporated Self-aligned epitaxial method for the fabrication of semiconductor devices
US4036672A (en) * 1975-05-14 1977-07-19 Hitachi, Ltd. Method of making a junction type field effect transistor
US4067036A (en) * 1975-08-09 1978-01-03 Nippon Gakki Seizo Kabushiki Kaisha Junction field effect transistor of vertical type

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXBK/77 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0445008A1 (fr) * 1990-02-27 1991-09-04 Thomson-Csf Procédé de réalisation de dispositifs électroniques haute densité

Also Published As

Publication number Publication date
FR2452784B1 (fr) 1985-03-08
JPS55130176A (en) 1980-10-08
DE3012119A1 (de) 1980-10-02
DE3012119C2 (de) 1985-11-07
US4329772A (en) 1982-05-18

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