DE2950413A1 - Halbleiteranordnungen und verfahren zu deren herstellung - Google Patents

Halbleiteranordnungen und verfahren zu deren herstellung

Info

Publication number
DE2950413A1
DE2950413A1 DE19792950413 DE2950413A DE2950413A1 DE 2950413 A1 DE2950413 A1 DE 2950413A1 DE 19792950413 DE19792950413 DE 19792950413 DE 2950413 A DE2950413 A DE 2950413A DE 2950413 A1 DE2950413 A1 DE 2950413A1
Authority
DE
Germany
Prior art keywords
zone
semiconductor
layer
mask layer
insulation layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19792950413
Other languages
German (de)
English (en)
Other versions
DE2950413C2 (US07223432-20070529-C00017.png
Inventor
Wolfgang Martin Feist
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Raytheon Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Raytheon Co filed Critical Raytheon Co
Publication of DE2950413A1 publication Critical patent/DE2950413A1/de
Application granted granted Critical
Publication of DE2950413C2 publication Critical patent/DE2950413C2/de
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1033Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/42376Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66659Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)
DE19792950413 1978-12-15 1979-12-14 Halbleiteranordnungen und verfahren zu deren herstellung Granted DE2950413A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US96990678A 1978-12-15 1978-12-15

Publications (2)

Publication Number Publication Date
DE2950413A1 true DE2950413A1 (de) 1980-06-26
DE2950413C2 DE2950413C2 (US07223432-20070529-C00017.png) 1989-12-28

Family

ID=25516148

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19792950413 Granted DE2950413A1 (de) 1978-12-15 1979-12-14 Halbleiteranordnungen und verfahren zu deren herstellung

Country Status (6)

Country Link
JP (1) JPS5583270A (US07223432-20070529-C00017.png)
CA (1) CA1138571A (US07223432-20070529-C00017.png)
DE (1) DE2950413A1 (US07223432-20070529-C00017.png)
FR (2) FR2445618A1 (US07223432-20070529-C00017.png)
GB (1) GB2038088B (US07223432-20070529-C00017.png)
IT (1) IT1120149B (US07223432-20070529-C00017.png)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0050773A2 (de) * 1980-10-29 1982-05-05 Siemens Aktiengesellschaft Steuerbares MIS-Bauelement
EP0059848A2 (en) * 1981-03-05 1982-09-15 International Business Machines Corporation FET and method for manufacturing such

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3322669C2 (de) * 1982-07-08 1986-04-24 General Electric Co., Schenectady, N.Y. Verfahren zum Herstellen einer Halbleitervorrichtung mit isolierten Gateelektroden
JPH0427799Y2 (US07223432-20070529-C00017.png) * 1986-08-28 1992-07-03
US5151374A (en) * 1991-07-24 1992-09-29 Industrial Technology Research Institute Method of forming a thin film field effect transistor having a drain channel junction that is spaced from the gate electrode
US5604139A (en) * 1994-02-10 1997-02-18 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device
JP2007085210A (ja) * 2005-09-21 2007-04-05 Hitachi Ltd 水車又はポンプ水車

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4058822A (en) * 1975-05-30 1977-11-15 Sharp Kabushiki Kaisha High voltage, low on-resistance diffusion-self-alignment metal oxide semiconductor device and manufacture thereof
EP0005720A1 (fr) * 1978-05-30 1979-12-12 International Business Machines Corporation Procédé de fabrication de transistors à effet de champ et à porte isolée à canal efficace très court

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5636585B2 (US07223432-20070529-C00017.png) * 1973-07-02 1981-08-25
US4001048A (en) * 1974-06-26 1977-01-04 Signetics Corporation Method of making metal oxide semiconductor structures using ion implantation
JPS5284981A (en) * 1976-01-06 1977-07-14 Mitsubishi Electric Corp Production of insulated gate type semiconductor device
US4062699A (en) * 1976-02-20 1977-12-13 Western Digital Corporation Method for fabricating diffusion self-aligned short channel MOS device
JPS605075B2 (ja) * 1976-12-29 1985-02-08 松下電器産業株式会社 Mos型半導体装置およびその製造方法
DE2703877C2 (de) * 1977-01-31 1982-06-03 Siemens Ag, 1000 Berlin Und 8000 Muenchen MIS-Transistor von kurzer Kanallänge und Verfahren zu seiner Herstellung
JPS53135581A (en) * 1977-05-02 1978-11-27 Hitachi Ltd Manufacture for mos semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4058822A (en) * 1975-05-30 1977-11-15 Sharp Kabushiki Kaisha High voltage, low on-resistance diffusion-self-alignment metal oxide semiconductor device and manufacture thereof
EP0005720A1 (fr) * 1978-05-30 1979-12-12 International Business Machines Corporation Procédé de fabrication de transistors à effet de champ et à porte isolée à canal efficace très court

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0050773A2 (de) * 1980-10-29 1982-05-05 Siemens Aktiengesellschaft Steuerbares MIS-Bauelement
EP0050773A3 (en) * 1980-10-29 1983-01-26 Siemens Aktiengesellschaft Controllable mis device
EP0059848A2 (en) * 1981-03-05 1982-09-15 International Business Machines Corporation FET and method for manufacturing such
EP0059848A3 (en) * 1981-03-05 1983-07-20 International Business Machines Corporation Fet and method for manufacturing such
US4442589A (en) * 1981-03-05 1984-04-17 International Business Machines Corporation Method for manufacturing field effect transistors

Also Published As

Publication number Publication date
DE2950413C2 (US07223432-20070529-C00017.png) 1989-12-28
IT7951008A0 (it) 1979-12-06
CA1138571A (en) 1982-12-28
FR2445618A1 (fr) 1980-07-25
GB2038088A (en) 1980-07-16
JPS6326553B2 (US07223432-20070529-C00017.png) 1988-05-30
IT1120149B (it) 1986-03-19
FR2453501A1 (fr) 1980-10-31
FR2445618B1 (US07223432-20070529-C00017.png) 1985-03-01
JPS5583270A (en) 1980-06-23
FR2453501B1 (US07223432-20070529-C00017.png) 1984-09-07
GB2038088B (en) 1983-05-25

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee