DE2806492A1 - Halbleiterbauelement und verfahren zu dessen herstellung - Google Patents

Halbleiterbauelement und verfahren zu dessen herstellung

Info

Publication number
DE2806492A1
DE2806492A1 DE19782806492 DE2806492A DE2806492A1 DE 2806492 A1 DE2806492 A1 DE 2806492A1 DE 19782806492 DE19782806492 DE 19782806492 DE 2806492 A DE2806492 A DE 2806492A DE 2806492 A1 DE2806492 A1 DE 2806492A1
Authority
DE
Germany
Prior art keywords
layer
passivation
silicon dioxide
particles
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE19782806492
Other languages
German (de)
English (en)
Inventor
Walter Arthur Hicinbothem
Ming Liang Tarng
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Publication of DE2806492A1 publication Critical patent/DE2806492A1/de
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3171Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Formation Of Insulating Films (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Photovoltaic Devices (AREA)
DE19782806492 1977-02-24 1978-02-16 Halbleiterbauelement und verfahren zu dessen herstellung Ceased DE2806492A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US77174977A 1977-02-24 1977-02-24

Publications (1)

Publication Number Publication Date
DE2806492A1 true DE2806492A1 (de) 1978-08-31

Family

ID=25092854

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19782806492 Ceased DE2806492A1 (de) 1977-02-24 1978-02-16 Halbleiterbauelement und verfahren zu dessen herstellung

Country Status (10)

Country Link
JP (1) JPS53105979A (it)
BE (1) BE864271A (it)
DE (1) DE2806492A1 (it)
FR (1) FR2382095B1 (it)
GB (1) GB1552760A (it)
IN (1) IN147578B (it)
IT (1) IT1092729B (it)
PL (1) PL117841B1 (it)
SE (1) SE7801092L (it)
YU (1) YU42276B (it)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3021175A1 (de) * 1980-06-04 1981-12-10 Siemens AG, 1000 Berlin und 8000 München Verfahren zum passivieren von siliciumbauelementen
FR2487576A1 (fr) * 1980-07-24 1982-01-29 Thomson Csf Procede de fabrication de diodes mesa glassivees
JPS60208886A (ja) * 1984-03-31 1985-10-21 株式会社東芝 電子部品の製造方法
US4826733A (en) * 1986-12-03 1989-05-02 Dow Corning Corporation Sin-containing coatings for electronic devices
FR2625839B1 (fr) * 1988-01-13 1991-04-26 Sgs Thomson Microelectronics Procede de passivation d'un circuit integre

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2513459A1 (de) * 1974-03-30 1975-10-09 Sony Corp Halbleiteranordnung und verfahren zu ihrer herstellung
DE2513945A1 (de) * 1974-04-19 1975-10-30 Rca Corp Verfahren zum passivieren der oberflaechen von halbleiterbauteilen
DE2600321A1 (de) * 1975-01-16 1976-07-22 Philips Nv Verfahren zur herstellung von halbleiteranordnungen, bei dem auf eine halbleiterscheibe ein glasueberzug angebracht wird, und durch dieses verfahren hergestellte halbleiteranordnungen

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1250099A (it) * 1969-04-14 1971-10-20
JPS6022497B2 (ja) * 1974-10-26 1985-06-03 ソニー株式会社 半導体装置
JPS6041458B2 (ja) * 1975-04-21 1985-09-17 ソニー株式会社 半導体装置の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2513459A1 (de) * 1974-03-30 1975-10-09 Sony Corp Halbleiteranordnung und verfahren zu ihrer herstellung
DE2513945A1 (de) * 1974-04-19 1975-10-30 Rca Corp Verfahren zum passivieren der oberflaechen von halbleiterbauteilen
DE2600321A1 (de) * 1975-01-16 1976-07-22 Philips Nv Verfahren zur herstellung von halbleiteranordnungen, bei dem auf eine halbleiterscheibe ein glasueberzug angebracht wird, und durch dieses verfahren hergestellte halbleiteranordnungen

Also Published As

Publication number Publication date
GB1552760A (en) 1979-09-19
YU42276B (en) 1988-08-31
PL204821A1 (pl) 1978-11-06
PL117841B1 (en) 1981-08-31
SE7801092L (sv) 1978-08-25
JPS53105979A (en) 1978-09-14
BE864271A (fr) 1978-06-16
FR2382095B1 (fr) 1985-10-18
JPS5626981B2 (it) 1981-06-22
IN147578B (it) 1980-04-19
IT1092729B (it) 1985-07-12
FR2382095A1 (fr) 1978-09-22
IT7819175A0 (it) 1978-01-11
YU19278A (en) 1982-06-30

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8131 Rejection