FR2382095A1 - Structure de passivation en plusieurs couches et procede de fabrication - Google Patents

Structure de passivation en plusieurs couches et procede de fabrication

Info

Publication number
FR2382095A1
FR2382095A1 FR7804587A FR7804587A FR2382095A1 FR 2382095 A1 FR2382095 A1 FR 2382095A1 FR 7804587 A FR7804587 A FR 7804587A FR 7804587 A FR7804587 A FR 7804587A FR 2382095 A1 FR2382095 A1 FR 2382095A1
Authority
FR
France
Prior art keywords
layer
passivation structure
manufacturing process
layer passivation
passivating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7804587A
Other languages
English (en)
Other versions
FR2382095B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Publication of FR2382095A1 publication Critical patent/FR2382095A1/fr
Application granted granted Critical
Publication of FR2382095B1 publication Critical patent/FR2382095B1/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Formation Of Insulating Films (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Photovoltaic Devices (AREA)

Abstract

L'invention concerne un procédé de fabrication d'une structure de passivation en plusieurs couches. Selon l'invention, on forme, sur une surface 20 d'un corps en matériau semi-conducteur 12, une première couche 22 en silicium polycristallin de forte résistivité ; et on dispose sur la couche 22, une seconde couche 24 et une troisième couche 26 en matériau passivant, l'une des seconde et troisième couches étant en un agent passivant particulaire. L'invention s'applique notamment aux semi-conducteurs.
FR7804587A 1977-02-24 1978-02-17 Structure de passivation en plusieurs couches et procede de fabrication Expired FR2382095B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US77174977A 1977-02-24 1977-02-24

Publications (2)

Publication Number Publication Date
FR2382095A1 true FR2382095A1 (fr) 1978-09-22
FR2382095B1 FR2382095B1 (fr) 1985-10-18

Family

ID=25092854

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7804587A Expired FR2382095B1 (fr) 1977-02-24 1978-02-17 Structure de passivation en plusieurs couches et procede de fabrication

Country Status (10)

Country Link
JP (1) JPS53105979A (fr)
BE (1) BE864271A (fr)
DE (1) DE2806492A1 (fr)
FR (1) FR2382095B1 (fr)
GB (1) GB1552760A (fr)
IN (1) IN147578B (fr)
IT (1) IT1092729B (fr)
PL (1) PL117841B1 (fr)
SE (1) SE7801092L (fr)
YU (1) YU42276B (fr)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0041684A1 (fr) * 1980-06-04 1981-12-16 Siemens Aktiengesellschaft Méthode de préparation de prise de contact de dispositifs en silicium pourvus de couches d'aluminium
FR2487576A1 (fr) * 1980-07-24 1982-01-29 Thomson Csf Procede de fabrication de diodes mesa glassivees
EP0157590A2 (fr) * 1984-03-31 1985-10-09 Kabushiki Kaisha Toshiba Dispositif électronique enrobé
EP0270220A2 (fr) * 1986-12-03 1988-06-08 Dow Corning Corporation Revêtements contenant du SiN pour dispositifs électroniques
FR2625839A1 (fr) * 1988-01-13 1989-07-13 Sgs Thomson Microelectronics Procede de passivation d'un circuit integre

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1250099A (fr) * 1969-04-14 1971-10-20
FR2266301A1 (fr) * 1974-03-30 1975-10-24 Sony Corp
FR2290040A1 (fr) * 1974-10-26 1976-05-28 Sony Corp Composant semi-conducteur, circuit integre comprenant de tels composants et procede de fabrication
FR2309036A1 (fr) * 1975-04-21 1976-11-19 Sony Corp Dispositif semiconducteur et son procede de fabrication

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3895127A (en) * 1974-04-19 1975-07-15 Rca Corp Method of selectively depositing glass on semiconductor devices
NL7500492A (nl) * 1975-01-16 1976-07-20 Philips Nv Werkwijze voor het vervaardigen van halfgelei- derinrichtingen, waarbij een glazen bedekking wordt aangebracht, en halfgeleiderinrichtingen, vervaardigd volgens deze werkwijze.

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1250099A (fr) * 1969-04-14 1971-10-20
FR2266301A1 (fr) * 1974-03-30 1975-10-24 Sony Corp
FR2290040A1 (fr) * 1974-10-26 1976-05-28 Sony Corp Composant semi-conducteur, circuit integre comprenant de tels composants et procede de fabrication
FR2309036A1 (fr) * 1975-04-21 1976-11-19 Sony Corp Dispositif semiconducteur et son procede de fabrication

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0041684A1 (fr) * 1980-06-04 1981-12-16 Siemens Aktiengesellschaft Méthode de préparation de prise de contact de dispositifs en silicium pourvus de couches d'aluminium
FR2487576A1 (fr) * 1980-07-24 1982-01-29 Thomson Csf Procede de fabrication de diodes mesa glassivees
EP0157590A2 (fr) * 1984-03-31 1985-10-09 Kabushiki Kaisha Toshiba Dispositif électronique enrobé
EP0157590A3 (en) * 1984-03-31 1987-05-27 Kabushiki Kaisha Toshiba Packaged electronic device
EP0270220A2 (fr) * 1986-12-03 1988-06-08 Dow Corning Corporation Revêtements contenant du SiN pour dispositifs électroniques
EP0270220A3 (en) * 1986-12-03 1989-04-26 Dow Corning Corporation Sin-containing coatings for electronic devices sin-containing coatings for electronic devices
FR2625839A1 (fr) * 1988-01-13 1989-07-13 Sgs Thomson Microelectronics Procede de passivation d'un circuit integre
EP0327412A1 (fr) * 1988-01-13 1989-08-09 STMicroelectronics S.A. Procédé de passivation d'un circuit intégré

Also Published As

Publication number Publication date
YU19278A (en) 1982-06-30
PL117841B1 (en) 1981-08-31
FR2382095B1 (fr) 1985-10-18
IT7819175A0 (it) 1978-01-11
SE7801092L (sv) 1978-08-25
DE2806492A1 (de) 1978-08-31
JPS5626981B2 (fr) 1981-06-22
GB1552760A (en) 1979-09-19
IT1092729B (it) 1985-07-12
IN147578B (fr) 1980-04-19
JPS53105979A (en) 1978-09-14
YU42276B (en) 1988-08-31
PL204821A1 (pl) 1978-11-06
BE864271A (fr) 1978-06-16

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Legal Events

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