FR2382094A1 - Passivation d'une interception de surface d'une jonction pn - Google Patents

Passivation d'une interception de surface d'une jonction pn

Info

Publication number
FR2382094A1
FR2382094A1 FR7804586A FR7804586A FR2382094A1 FR 2382094 A1 FR2382094 A1 FR 2382094A1 FR 7804586 A FR7804586 A FR 7804586A FR 7804586 A FR7804586 A FR 7804586A FR 2382094 A1 FR2382094 A1 FR 2382094A1
Authority
FR
France
Prior art keywords
junction
passivation
layer
regions
polycrystalline silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7804586A
Other languages
English (en)
Other versions
FR2382094B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Publication of FR2382094A1 publication Critical patent/FR2382094A1/fr
Application granted granted Critical
Publication of FR2382094B1 publication Critical patent/FR2382094B1/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/298Semiconductor material, e.g. amorphous silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3171Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

L'invention concerne un dispositif semi-conducteur comprenant un corps semi-conducteur ayant une surface, au moins deux régions de types de conductivité opposés dans le corps, une jonction PN à l'interface entre les deux régions, cette jonction PN s'étendant jusqu'à la surface du corps, et une couche de silicium polycristallin de forte résistivité sur la surface. Selon l'invention, une couche 24 d'un matériau particulaire de passivation est déposée sur la couche en silicium polycristallin 22. L'invention s'applique notamment à l'industrie de semi-conducteurs.
FR7804586A 1977-02-24 1978-02-17 Passivation d'une interception de surface d'une jonction pn Expired FR2382094B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US77168177A 1977-02-24 1977-02-24

Publications (2)

Publication Number Publication Date
FR2382094A1 true FR2382094A1 (fr) 1978-09-22
FR2382094B1 FR2382094B1 (fr) 1985-07-19

Family

ID=25092625

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7804586A Expired FR2382094B1 (fr) 1977-02-24 1978-02-17 Passivation d'une interception de surface d'une jonction pn

Country Status (10)

Country Link
JP (1) JPS53105978A (fr)
BE (1) BE864270A (fr)
DE (1) DE2806493A1 (fr)
FR (1) FR2382094B1 (fr)
GB (1) GB1552759A (fr)
IN (1) IN147572B (fr)
IT (1) IT1091594B (fr)
PL (1) PL116754B1 (fr)
SE (1) SE7801091L (fr)
YU (1) YU14978A (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6312166U (fr) * 1986-07-08 1988-01-26
CA1339817C (fr) * 1989-05-31 1998-04-14 Mitel Corporation Operation de chauffage et de passivation de materiaux de spin sur verre utilisant un plasma et produits avec ces operations
JPH0316373U (fr) * 1989-06-28 1991-02-19
RU2534563C2 (ru) * 2013-01-09 2014-11-27 Федеральное Государственное Бюджетное Образовательное Учреждение Высшего Профессионального Образования "Дагестанский Государственный Технический Университет" (Дгту) Способ нанесения стекла

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1250099A (fr) * 1969-04-14 1971-10-20
DE1274736B (de) * 1964-12-03 1974-02-07 Verfahren zur herstellung einer halbleitervorrichtung
FR2266301A1 (fr) * 1974-03-30 1975-10-24 Sony Corp
US4007476A (en) * 1975-04-21 1977-02-08 Hutson Jearld L Technique for passivating semiconductor devices

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3895127A (en) * 1974-04-19 1975-07-15 Rca Corp Method of selectively depositing glass on semiconductor devices
NL7500492A (nl) * 1975-01-16 1976-07-20 Philips Nv Werkwijze voor het vervaardigen van halfgelei- derinrichtingen, waarbij een glazen bedekking wordt aangebracht, en halfgeleiderinrichtingen, vervaardigd volgens deze werkwijze.

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1274736B (de) * 1964-12-03 1974-02-07 Verfahren zur herstellung einer halbleitervorrichtung
GB1250099A (fr) * 1969-04-14 1971-10-20
FR2266301A1 (fr) * 1974-03-30 1975-10-24 Sony Corp
US4007476A (en) * 1975-04-21 1977-02-08 Hutson Jearld L Technique for passivating semiconductor devices

Also Published As

Publication number Publication date
PL204820A1 (pl) 1978-11-06
DE2806493A1 (de) 1978-08-31
IT7819030A0 (it) 1978-01-04
IT1091594B (it) 1985-07-06
PL116754B1 (en) 1981-06-30
YU14978A (en) 1982-10-31
BE864270A (fr) 1978-06-16
IN147572B (fr) 1980-04-19
SE7801091L (sv) 1978-08-25
GB1552759A (en) 1979-09-19
JPS53105978A (en) 1978-09-14
JPS5626980B2 (fr) 1981-06-22
FR2382094B1 (fr) 1985-07-19

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