FR2438342A1 - Dispositif a semi-conducteurs du type mos a rainures en u - Google Patents

Dispositif a semi-conducteurs du type mos a rainures en u

Info

Publication number
FR2438342A1
FR2438342A1 FR7924747A FR7924747A FR2438342A1 FR 2438342 A1 FR2438342 A1 FR 2438342A1 FR 7924747 A FR7924747 A FR 7924747A FR 7924747 A FR7924747 A FR 7924747A FR 2438342 A1 FR2438342 A1 FR 2438342A1
Authority
FR
France
Prior art keywords
mos
substrate
semiconductor device
drain
mos elements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7924747A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
American Microsystems Holding Corp
Original Assignee
American Microsystems Holding Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Microsystems Holding Corp filed Critical American Microsystems Holding Corp
Publication of FR2438342A1 publication Critical patent/FR2438342A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356—Disposition, e.g. buried gate electrode
    • H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7827—Vertical transistors

Landscapes

  • Microelectronics & Electronic Packaging (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

LE DISPOSITIF A SEMI-CONDUCTEURS SELON L'INVENTION COMPREND PLUSIEURS ELEMENTS U-MOS COMPRENANT CHACUN UN EVIDEMENT ETROIT DE FORME ALLONGEE ET A SECTION DROITE EN U, OBTENU A L'AIDE D'UN AGENT CORROSIF ANISOTROPIQUE DANS UN SUBSTRAT 74 EN SILICIUM AYANT UNE SURFACE DANS LE PLAN 110 DU CRISTAL ET DEUX PLANS 111 PERPENDICULAIRES A LA SURFACE. LES REGIONS DE DRAIN 86 POUR CHAQUE ELEMENT SONT FORMEES DANS LA SURFACE D'UNE COUCHE EPITAXIALE 76 S'ETENDANT SUR LE SUBSTRAT QUI A LA MEME CONDUCTIVITE QUE LA REGION DE DRAIN ET CONSTITUE UNE SOURCE COMMUNE POUR TOUS LES ELEMENTS U-MOS. ENTRE LA COUCHE EPITAXIALE ET LE SUBSTRAT 74, SE TROUVE UNE COUCHE INTERMEDIAIRE MODEREMENT DOPEE, D'UN TYPE DE CONDUCTIVITE OPPOSE ET CONSTITUANT LE CANAL DU DISPOSITIF ENTRE LES REGIONS DE DRAIN ET DE SOURCE. LES ELEMENTS U-MOS ONT UNE CAPACITE DE TRANSPORT DE COURANT MEILLEURE AINSI QU'UNE VITESSE ACCRUE SUR LES DISPOSITIFS ANTERIEURS, DE MEME QU'ILS ASSURENT UNE PLUS GRANDE DENSITE D'ELEMENTS PAR UNITE DE SUPERFICIE.
FR7924747A 1978-10-05 1979-10-04 Dispositif a semi-conducteurs du type mos a rainures en u Withdrawn FR2438342A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US94881478A 1978-10-05 1978-10-05

Publications (1)

Publication Number Publication Date
FR2438342A1 true FR2438342A1 (fr) 1980-04-30

Family

ID=25488272

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7924747A Withdrawn FR2438342A1 (fr) 1978-10-05 1979-10-04 Dispositif a semi-conducteurs du type mos a rainures en u

Country Status (7)

Country Link
JP (1) JPS5552273A (fr)
CA (1) CA1115426A (fr)
DE (1) DE2931272A1 (fr)
FR (1) FR2438342A1 (fr)
GB (1) GB2032686A (fr)
IT (1) IT1123772B (fr)
NL (1) NL7905402A (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2511808A1 (fr) * 1981-08-19 1983-02-25 Secr Defence Brit Procede de fabrication d'un transistor a canal vertical
EP0097442A2 (fr) * 1982-06-21 1984-01-04 Eaton Corporation Transistor à effet de champ latéral bidirectionnel comportant une entaille
EP0238749A2 (fr) * 1986-03-24 1987-09-30 SILICONIX Incorporated Dispositifs MOS unipolaires et bipolaires à grille à découpe et méthode de fabrication
US5034785A (en) * 1986-03-24 1991-07-23 Siliconix Incorporated Planar vertical channel DMOS structure

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS598375A (ja) * 1982-07-05 1984-01-17 Matsushita Electronics Corp 縦型構造電界効果トランジスタ
US6335247B1 (en) * 2000-06-19 2002-01-01 Infineon Technologies Ag Integrated circuit vertical trench device and method of forming thereof
JP3531613B2 (ja) 2001-02-06 2004-05-31 株式会社デンソー トレンチゲート型半導体装置及びその製造方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2511808A1 (fr) * 1981-08-19 1983-02-25 Secr Defence Brit Procede de fabrication d'un transistor a canal vertical
EP0097442A2 (fr) * 1982-06-21 1984-01-04 Eaton Corporation Transistor à effet de champ latéral bidirectionnel comportant une entaille
EP0097442A3 (fr) * 1982-06-21 1986-04-30 Eaton Corporation Transistor à effet de champ latéral bidirectionnel comportant une entaille
EP0238749A2 (fr) * 1986-03-24 1987-09-30 SILICONIX Incorporated Dispositifs MOS unipolaires et bipolaires à grille à découpe et méthode de fabrication
EP0238749A3 (fr) * 1986-03-24 1988-08-31 SILICONIX Incorporated Dispositifs MOS unipolaires et bipolaires à grille à découpe et méthode de fabrication
US5034785A (en) * 1986-03-24 1991-07-23 Siliconix Incorporated Planar vertical channel DMOS structure

Also Published As

Publication number Publication date
IT7926258A0 (it) 1979-10-04
GB2032686A (en) 1980-05-08
NL7905402A (nl) 1980-04-09
IT1123772B (it) 1986-04-30
CA1115426A (fr) 1981-12-29
DE2931272A1 (de) 1980-04-24
JPS5552273A (en) 1980-04-16

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Legal Events

Date Code Title Description
ST Notification of lapse