DE2249730C3 - Halbleiteranordnung mit einer mit Leiterbahnen versehenen isolierenden FoUe - Google Patents

Halbleiteranordnung mit einer mit Leiterbahnen versehenen isolierenden FoUe

Info

Publication number
DE2249730C3
DE2249730C3 DE2249730A DE2249730A DE2249730C3 DE 2249730 C3 DE2249730 C3 DE 2249730C3 DE 2249730 A DE2249730 A DE 2249730A DE 2249730 A DE2249730 A DE 2249730A DE 2249730 C3 DE2249730 C3 DE 2249730C3
Authority
DE
Germany
Prior art keywords
semiconductor body
cooling plate
semiconductor
conductor tracks
envelope
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2249730A
Other languages
German (de)
English (en)
Other versions
DE2249730A1 (de
DE2249730B2 (de
Inventor
Philip Johan De Nijmegen Graaff (Niederlande)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of DE2249730A1 publication Critical patent/DE2249730A1/de
Publication of DE2249730B2 publication Critical patent/DE2249730B2/de
Application granted granted Critical
Publication of DE2249730C3 publication Critical patent/DE2249730C3/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3405Edge mounted components, e.g. terminals
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00Arrangements for thermal protection or thermal control
    • H10W40/70Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
    • H10W40/77Auxiliary members characterised by their shape
    • H10W40/778Auxiliary members characterised by their shape in encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/453Leadframes comprising flexible metallic tapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/124Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed the encapsulations having cavities other than that occupied by chips
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/189Printed circuits structurally associated with non-printed electric components characterised by the use of flexible or folded printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10386Clip leads; Terminals gripping the edge of a substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07251Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
DE2249730A 1971-10-14 1972-10-11 Halbleiteranordnung mit einer mit Leiterbahnen versehenen isolierenden FoUe Expired DE2249730C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7114112A NL7114112A (https=) 1971-10-14 1971-10-14

Publications (3)

Publication Number Publication Date
DE2249730A1 DE2249730A1 (de) 1973-04-19
DE2249730B2 DE2249730B2 (de) 1980-01-24
DE2249730C3 true DE2249730C3 (de) 1980-11-13

Family

ID=19814253

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2249730A Expired DE2249730C3 (de) 1971-10-14 1972-10-11 Halbleiteranordnung mit einer mit Leiterbahnen versehenen isolierenden FoUe

Country Status (10)

Country Link
JP (1) JPS5329273B2 (https=)
AU (1) AU474165B2 (https=)
CA (1) CA964382A (https=)
CH (1) CH545006A (https=)
DE (1) DE2249730C3 (https=)
FR (1) FR2156343B1 (https=)
GB (1) GB1403786A (https=)
IT (1) IT968868B (https=)
NL (1) NL7114112A (https=)
SE (1) SE378706B (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL189379C (nl) * 1977-05-05 1993-03-16 Richardus Henricus Johannes Fi Werkwijze voor inkapselen van micro-elektronische elementen.
US4377316A (en) * 1981-02-27 1983-03-22 International Business Machines Corporation High density interconnection means for chip carriers
DE3530827A1 (de) * 1985-08-29 1987-03-05 Vdo Schindling Kontaktvorrichtung
DE10342295B4 (de) * 2003-09-12 2012-02-02 Infineon Technologies Ag Anordnung eines elektrischen Bauelements mit einer elektrischen Isolationsfolie auf einem Substrat und Verfahren zum Herstellen der Anordnung

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3544857A (en) * 1966-08-16 1970-12-01 Signetics Corp Integrated circuit assembly with lead structure and method
FR1534329A (fr) * 1966-08-16 1968-07-26 Signetics Corp Procédé de montage de circuits intégrés

Also Published As

Publication number Publication date
CH545006A (de) 1973-11-30
DE2249730A1 (de) 1973-04-19
FR2156343B1 (https=) 1977-12-23
AU4752572A (en) 1974-04-26
NL7114112A (https=) 1973-04-17
FR2156343A1 (https=) 1973-05-25
JPS4847275A (https=) 1973-07-05
SE378706B (https=) 1975-09-08
IT968868B (it) 1974-03-20
AU474165B2 (en) 1976-07-15
JPS5329273B2 (https=) 1978-08-19
DE2249730B2 (de) 1980-01-24
GB1403786A (en) 1975-08-28
CA964382A (en) 1975-03-11

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Legal Events

Date Code Title Description
OD Request for examination
C3 Grant after two publication steps (3rd publication)
8339 Ceased/non-payment of the annual fee